TrendForce has observed that some cloud service providers are adding QLC SSDs to SSD PODs, replacing the default TLC SSD plus HDD configuration. In AI inference, the Prefill and Decode stages repeatedly read and write KV Cache, and as context windows and batch sizes grow, KV Cache capacity needs multiply, prompting vendors to move caching from costly, capacity-limited HBM down to cheaper tiers.
Perplexity launched a portable agentic PC powered by AMD Ryzen AI Max series processors. The page's body consists mainly of terms and conditions for downloading AMD brand assets, with no further technical details about the product.
AMD released an "Advanced Insights" video explaining how the Zen architecture is evolving for the agentic AI era. The page contains only AMD brand asset download terms, with no specific technical details or data on the architecture's evolution.
Based on AI server shipments, TrendForce projects that global data center power demand capacity will reach 490.7GW by 2030, with the US at 272.4GW, while US grid deliverable capacity will be only 100.7GW, leaving a gap of more than 170GW, of which about 49GW stems from the grid being unable to deliver on schedule.
Marvell will present industry-first 2nm optical interconnect demonstrations at ECOC 2026 in Malaga, Spain, September 20–24, 2026, including the first 2nm 400G/lane optical PAM4, the first 2nm 800G ZR/ZR+ pluggable modules with MACsec (driven by the Libra 2nm coherent DSP), and the first 2nm 1.6T ZR and coherent-lite O-band demos.
AMD has released a white paper evaluating 6th Gen AMD EPYC 9006 "Venice" server CPUs across general-purpose, enterprise, cloud-native, AI and HPC workloads.
SK hynix took part in AI Infra Summit 2026, held September 15–17 in Santa Clara, USA, presenting next-generation AI memory solutions under the theme "New Spectrum." Attendance was about 6,000, double the previous year.
At the AI Infra Summit, AMD argued that the core of AI infrastructure design should not be chips or networking but a system's ability to adapt to changing demands. The piece notes that agentic AI turns a single request into a multi-step chain of retrieval, tool calls, code execution and sub-agent coordination, and should be measured by cost per completed task rather than cost per token, offering three auditable principles: adaptable, economical, and open.
TrendForce says 4hi HBM samples will enter supplier views in early 3Q26, with NVIDIA and other AI chip vendors evaluating low-stack configurations to cope with the HBM shortage. The spec has real use cases in edge AI scenarios like autonomous driving and robotics; SK hynix previously supplied HBM2E to Waymo in 2024 with automotive certification, but near-term demand contribution remains very low.
TrendForce launched Weekly Radar, a free subscription column that tracks supply and lead times for six component categories—GPU, DRAM, NAND, HDD, ABF, and MLCC—each week. The first issue notes the GPU is the only one of the six with lead times at balanced levels, while ABF lead times are 48-56 weeks, far above the balanced 12 weeks.
TrendForce takes a deep dive into 3D advanced packaging and hybrid bonding: TSMC's SoIC uses 3D interconnect with 56x the interconnect density and 5x the energy efficiency of CoWoS, entered mass production in 2025 with a 6µm bond pitch, and plans to shrink to 4.5µm by 2029; Intel's Foveros Direct, at a 9µm pitch, enters mass production in 1H26 with the Clearwater Forest Xeon 6+.
Marvell announced it will showcase its AI data center connectivity and storage solution portfolio at AI Infra Summit 2026 (September 15–17, Santa Clara Convention Center, Booth #704).
On September 8, SK hynix held its 2026 Future Forum at the SUPEX Center on its Icheon campus, under the theme "The Golden Age of the AI Era: The Moment for AI Memory Solution Creators to Change the World," discussing AX (AI transformation) trends and the direction of memory technology.
AI's demand for larger, more complex chip packaging is pushing the industry to explore panel-level packaging (PLP): replacing round wafers with rectangular panels to improve area utilization and scalability beyond traditional wafer-level packaging size limits. Lam Research is advancing the technology toward production readiness through tool innovation and infrastructure investments, including the Salzburg Panel Center of Excellence. The technology still faces challenges in uniformity control, yield management, and industry standards.
At the SPIE Photomask and EUV Lithography conference, Intel Foundry and ASML reported progress on High NA EUV volume readiness; the technology has already been used in production of some Core Ultra Series 3 (Panther Lake) processors on Intel's 18A process.
AMD claims that 14 EPYC 9965 servers can replace 100 dual-socket Intel Xeon Platinum 8280 servers aged 5-7 years, cutting server count by 86% while delivering the same total performance, reducing power consumption by 69% and three-year TCO by 41%.
Lam Research has broken ground on a new laboratory expansion at its R&D center in Tualatin, Oregon. Once complete, the facility will add 120,000 square feet, expanding cleanroom space by more than 50%, with operation expected in 2028.
AMD, Cisco and HUMAIN announced that AI infrastructure built on AMD Instinct MI355X GPUs, EPYC CPUs and Cisco Silicon One AI networking has officially gone live in Saudi Arabia, providing production-grade compute to HUMAIN customers, with plans to expand to 250 MW.
AMD announced that its Instinct GPUs and EPYC CPUs will provide the compute for Europe's next-generation LUMI-AI supercomputer. (The original article contains only AMD trademark download terms and provides no further technical details of the partnership.)
AMD, Cisco and HUMAIN announced that AI infrastructure based on AMD Instinct MI355X GPUs, AMD EPYC CPUs and Cisco Silicon One networking has gone live in Saudi Arabia, offering HUMAIN customers GPU-as-a-service from model training to inference, with plans to reach 1 GW by 2030.
In its AI Infrastructure Insight series, SK hynix explains that AI performance cannot rely solely on the compute of accelerators like GPUs; it also requires memory bandwidth, networking, storage and cooling to work in concert.
On August 25, at Dell Technologies Forum 2026 (DTF) held at COEX in Seoul, SK hynix showcased an AI memory portfolio spanning the full memory hierarchy, continuing its collaboration with strategic partner Dell.
Lam Research used SEMulator3D® integrated stress modeling to predict stress non-uniformity across GAA stacked nanosheet channels before fabrication — nFET stress differences reach 400–800 MPa, while pFET stays below 200 MPa. DOE experiments show that channel thickness, fin width, and lateral etch jointly affect stress uniformity, with increasing the topmost channel thickness from 4 nm to 7 nm significantly reducing the stress difference.
Hybrid bonding is becoming a key interconnect technology for next-generation products such as HBM, NAND, 3D-stacked DRAM and AI accelerators. It eliminates bumps and uses direct Cu–Cu bonding, shrinking chip pitch from about 100µm with solder balls and about 20µm with micro-bumps to under 1µm.
AMD announced it will be first to offer native UCIe 1.1 interface support in Versal adaptive SoCs, enabling low-power, high-bandwidth communication between adaptive SoCs and co-packaged specialty chiplets.
TrendForce maps the latest landscape of 2.5D/3D advanced packaging in the AI chip supply chain: TSMC's 5.5x reticle CoWoS is in mass production with yields above 98%, with plans to expand beyond 14x after 2029; Intel's EMIB-T yields have improved significantly, expanding beyond 8x this year and over 12x by 2028, targeting customer mass production in 2027.
AMD announced that as of mid-2026 its AI energy efficiency improvement is estimated at 4x, exceeding the 3x expected for this phase, as it advances toward its 20x30 goal of a 20x improvement in rack-scale AI training and inference energy efficiency by 2030.
Intel announced a proposed $15 billion underwritten public offering of common stock, with net proceeds intended for general corporate purposes, including capital expenditures and working capital. The company said unprecedented investment in AI compute has created a strong demand environment, and it granted underwriters a 30-day option to purchase up to an additional $2.25 billion of stock, with J.P. Morgan, Goldman Sachs, Morgan Stanley and Citigroup acting as joint bookrunners.
Why it matters: The announcement details the offering size, use of proceeds and underwriting arrangements, letting readers see how Intel plans to fund capital expenditures tied to AI compute demand.
AMD announced on August 6 that it has reached a definitive agreement to acquire Taalas, a Toronto-based specialized AI inference chip company. Founded in 2023, Taalas develops technology that reduces the compute and memory bottlenecks of general-purpose architectures by optimizing inference data flow; AMD plans to integrate the technology into its accelerator roadmap and develop system-level solutions alongside AMD Instinct GPUs. The deal remains subject to regulatory approval.
On August 6, AMD announced a definitive agreement to acquire Taalas, a Toronto-based company founded in 2023 focused on dedicated AI inference chips. Taalas' technology optimizes inference data flow to reduce the compute and memory bottlenecks of general-purpose architectures; AMD plans to integrate it into its accelerator roadmap, co-develop system-level solutions with AMD Instinct GPUs, and fold it into its full-stack AI platform spanning the Helios rack solution, EPYC CPUs, and ROCm software.
TrendForce analyzes China's path to building its own humanoid robot supply chain, projecting that China will account for nearly 70% of global production in 2026, with Unitree and AgiBot each shipping more than 1,000 units in 2025.
Arista Networks reported Q2 2026 revenue of $3.036 billion, up 12.1% sequentially and 37.7% year over year, its first quarter above $3 billion; non-GAAP diluted EPS was $1.02, up 40% year over year.
Why it matters: The report gives specific figures for quarterly revenue, profit, and Q3 guidance, helping readers assess the pace of Arista's growth in AI networking hardware.
Marvell will showcase its AI memory and storage portfolio at FMS 2026 on August 4-6 at Booth #805, featuring PCIe 6.0 enterprise SSD controllers, CXL near-memory acceleration and memory pooling switches, CXL memory expansion cards, Octeon DPUs, and Photonic Fabric technology for optical interconnect scaling.
Intel reported Q2 2026 revenue of $16.1 billion, up 25% year over year, with non-GAAP EPS of $0.42 and a GAAP loss per share of $2.16.
Why it matters: The report also discloses segment revenue, 18A-P progress, and capacity expansion investment plans, helping readers compare growth structure against changes in capital spending.
At Advancing AI 2026 on July 23, AMD unveiled a full-stack AI and physical AI product portfolio, including its first rackscale solution, AMD Helios (72 Instinct MI455X GPUs plus 18 6th Gen EPYC "Venice" CPUs).
Why it matters: The official announcement consolidates Helios rack, MI400 series CPU/GPU spec figures, and major customer deployment plans, allowing readers to benchmark actual progress against competing solutions.
On July 23, 2026 at Advancing AI 2026, AMD and Cerebras announced a technical collaboration integrating AMD Helios rack-scale solutions with the Cerebras Wafer-Scale Engine into a single disaggregated inference workflow.
AMD and Anthropic announced a strategic partnership under which Anthropic will deploy up to 2GW of AMD Instinct MI450 series GPUs (including MI455X, paired with EPYC "Venice" CPUs, Pensando networking, and ROCm) in AMD Helios rackscale solutions, with the first 1GW starting deployment in the first half of 2027.
Why it matters: The official announcement gives the deployment scale, timeline, and equity investment amount, letting readers understand the full structure of the partnership.
As test-time scaling rises, the AI industry's focus is shifting from training to inference, bringing structural changes to the memory hierarchy. In the first half of 2026, NVIDIA and Google respectively launched CMX, Rubin integrated Groq LPX, and the TPU v8i designed for inference (with 72 GB more HBM3e and 384 MB SRAM than the TPU v8t).
AMD announced an expanded long-term strategic partnership with Microsoft, which will deploy the AMD Helios Rackscale Solution at scale on Azure for frontier model inference, its own AI customers, and Azure AI services.
Why it matters: The official announcement specifies the concrete vehicle and product composition of the partnership, helping readers understand how the two companies divide roles in AI infrastructure and the pace of deployment.
TrendForce analysis indicates that large-scale AI data center (AIDC) deployments in 2026 are pushing energy storage from an optional add-on to critical infrastructure. North America urgently needs storage to secure 24/7 power given gas generation's 40-50% share and tight supply of large gas turbines; China has made compute-power coordination part of new infrastructure, making 4-8 hour long-duration storage standard for compute hubs. AIDC storage is deployed on both the data center side and the power generation side, and NVIDIA's 800V DC architecture white paper proposes facility-level and rack-level two-tier storage schemes.