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Oct 16Fri
Oct 15Thu
  1. Semiconductor Engineering Chips and Packaging31

    Beyond The Specification: What Really Determines PCIe Retimer Reach?

    The actual reach of a PCIe retimer is not set by the spec but by multiple factors including SerDes architecture, controller intelligence, channel quality, and diagnostics. PCI-SIG typically requires about 36 dB insertion loss tolerance, but leading vendors' retimers can tolerate 40 dB or more, enabling longer PCB traces, more connectors, and greater manufacturing variance. As PCIe Gen6 advances, designs beyond compliance testing, interoperability, and observability become key to real-world deployment reliability.

Oct 14Wed
Oct 13Tue
  1. Intel Official Announcements47

    Intel Accelerates Open Infrastructure for the Agentic AI Era

    At the OCP Global Summit, Intel detailed its GPU D-series (codenamed Crescent Island), built on the Xe3P architecture with up to 480 GB LPDDR5X memory, 1.5 TB/s memory bandwidth and 1.3 petaflops of FP8 compute at 350 watts; a single card supports 300-billion-parameter models and an 8-card system supports over 1 trillion parameters.

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Sep 17Thu
  1. AMD Chips and Compute26

    Building Infrastructure for an AI World in Motion

    At the AI Infra Summit, AMD argued that the core of AI infrastructure design should not be chips or networking but a system's ability to adapt to changing demands. The piece notes that agentic AI turns a single request into a multi-step chain of retrieval, tool calls, code execution and sub-agent coordination, and should be measured by cost per completed task rather than cost per token, offering three auditable principles: adaptable, economical, and open.

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