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#AI硬件

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TodayOct 18Sun
Oct 16Fri
Oct 15Thu
  1. Lam Research Semiconductor Manufacturing Technology36

    Lam and imec Expand Collaboration to Advance Manufacturability of Next-Gen 3D Integration Technologies, Explore Aether Dry Resist Use Cases

    Lam Research and imec are expanding their joint R&D collaboration with two new directions: advancing manufacturing readiness of 3D integration and advanced packaging, and advancing Aether® dry resist applications in imec's high-NA EUV research environment.

Oct 14Wed
  1. NVIDIA Blog35

    European Cities Deploy NVIDIA-Powered AI Agents to Run Smarter Urban Operations

    Multiple cities across the EMEA region, along with software partners, are using NVIDIA accelerated computing to build physical AI agents and digital twins for urban planning, predictive maintenance, and public services. France's Côte-d'Or department deployed a sovereign digital twin based on Nemotron and Omniverse across more than 500 public buildings, cutting document retrieval time from weeks to minutes, lowering operating costs by 10%, with a target of 30% at scale.

Oct 13Tue
  2. NVIDIA Blog68

    All Systems Go: Global PC App Ecosystem Ready for NVIDIA RTX Spark

    NVIDIA announced that RTX Spark laptops go on sale October 16, with up to 128GB unified memory and 1 petaflop of AI compute, alongside multiple software updates released with ecosystem partners.

    Why it matters: The official roundup covers the software ecosystem around the RTX Spark launch, with specific updates and timing for local agent, creative, and developer tools.

  4. Intel Official Announcements47

    Intel Accelerates Open Infrastructure for the Agentic AI Era

    At the OCP Global Summit, Intel detailed its GPU D-series (codenamed Crescent Island), built on the Xe3P architecture with up to 480 GB LPDDR5X memory, 1.5 TB/s memory bandwidth and 1.3 petaflops of FP8 compute at 350 watts; a single card supports 300-billion-parameter models and an 8-card system supports over 1 trillion parameters.

  5. Marvell Optical Interconnect and Official Announcements44

    ADDING and REPLACING Marvell Unveils Second-generation Structera X, Industry-first Six-channel CXL 3.2 Memory Expanders for AI Inference

    Marvell has launched its second-generation Structera X 3406 and 3506 CXL 3.2 memory expanders, built on an industry-first six-channel DDR4/DDR5 design that increases channel count by 50% over the previous generation, supports PCIe Gen 6, and allows a single controller to support up to 9TB DDR4 or 6TB DDR5.

Oct 12Mon
  1. NVIDIA Blog63

    OCP Global Summit: Amid Ecosystem Adoption, NVIDIA Opens Vera Rubin Architecture to Help Scale AI Factories Worldwide

    At the OCP Global Summit, NVIDIA announced it is contributing Vera Rubin rack and compute tray designs to the OCP through its MGX open architecture. The MGX 1.2 spec adds rack-level blind-mate liquid cooling, a 5000A liquid-cooled busbar, and support for rack deployments of up to 250kW.

    Why it matters: The piece collects multiple open specifications such as MGX 1.2 and Open Data Center Specification v0.7, along with accompanying software, giving readers a view into the open foundations of AI factories.

  3. Marvell Optical Interconnect and Official Announcements42

    Marvell Unveils Second-generation Structera X, Industry-first Six-channel CXL 3.2 Memory Expanders for AI Inference

    Marvell released the second-generation Structera X 3406 and 3506 CXL 3.2 memory expanders, the industry's first six-channel CXL memory expansion products, with 50% more channels than the previous generation, supporting up to 9TB of DDR4 or 6TB of DDR5 per controller and delivering up to 256GB/s of host bandwidth over PCIe 6.0 x16.

Oct 9Fri
Oct 8Thu
  2. NVIDIA Blog72

    NVIDIA, Microsoft Kick Off a New Beginning for Windows PCs With RTX Spark and AI Agents

    NVIDIA and Microsoft announced at the Windows AI and Surface event in San Francisco that they are jointly building agent software and hardware for Windows PCs.

    Why it matters: The article details the specs and launch timeline for RTX Spark and DGX Station for Windows, helping readers assess how realistic running large models locally with resident agents will be.

Oct 5Mon
  1. AMD Chips and Compute14

    AMD Helios: Designing and Building the Future of AI Infrastructure (Videos)

    AMD has released video resources related to AMD Helios AI infrastructure, along with brand assets including AMD trademarks and logos for download. Before downloading, users must accept terms and conditions: these AMD Marks may only be used in promotional materials featuring products with AMD CPUs, GPUs, APUs or FPGAs, and AMD may terminate the license at any time.

Oct 2Fri
  3. SK hynix Memory Technology37

    [AI Ecosystem] Redesigning infrastructure: Why architecture determines performance

    As AI workloads shift toward inference and agentic AI, system bottlenecks are moving from compute to data movement. The article notes that under processor-centric architectures, fetching data once from DRAM can consume 150 to 2,000 times the energy of a simple arithmetic operation, and over 90% of system energy in large machine learning models may be spent on memory access and data movement. It leads into SK hynix's vision of building a next-generation AI memory ecosystem, arguing that GPUs/NPUs/TPUs, memory, storage and networking should be co-designed as a single system.

Oct 1Thu
Sep 30Wed
Sep 29Tue
  1. Lam Research Semiconductor Manufacturing Technology36

    Lam’s New Logistics Hub Built for Velocity, Resilience, and AI-Era Growth

    Lam Research has opened its largest US warehouse in Livermore, California—a 470,000-square-foot logistics and supply chain hub built to support semiconductor supply chain pressures driven by AI technology demand. A 40,000-square-foot automated storage and retrieval system with 15 robots cuts parts retrieval time from 6 minutes to under 30 seconds, 12 times faster than the existing system. The center is expected to support more than 200 jobs by 2027.

  2. AMD Official Announcements81

    AMD to Acquire World Labs to Advance the Future of AI Compute

    AMD announced it will acquire World Labs in an all-stock deal worth about $8.2 billion. World Labs, founded by Fei-Fei Li, focuses on spatial intelligence models and robotic learning and simulation technologies. The deal is expected to close by the end of 2026, after which Fei-Fei Li will become AMD's executive vice president and chief scientist, reporting to Lisa Su, with the team continuing its AI model research.

    Why it matters: AMD's official announcement fully discloses the deal value, equity structure, Fei-Fei Li's new role and the closing timeline, letting readers understand how the acquisition strengthens its model research capabilities.

Sep 28Mon
  2. AMD Chips and Compute78

    AMD to Acquire World Labs to Advance the Future of AI Compute

    AMD announced a definitive agreement to acquire World Labs in an all-stock deal valued at approximately $8.2 billion, expected to close by the end of 2026, subject to regulatory approval and other customary closing conditions. Founded by Fei-Fei Li and headquartered in San Francisco, World Labs develops spatial intelligence models that generate, reconstruct, and simulate interactive 3D environments from text, image, and video inputs, as well as robot learning and simulation technology.

    Why it matters: AMD's official announcement gives the deal amount, equity form, and timeline, helping readers understand its direction of integrating AI hardware with model research.

Sep 24Thu
Sep 23Wed
Sep 21Mon
  1. Marvell Optical Interconnect and Official Announcements43

    Marvell to Showcase Industry-First 2nm Optical Technology Demos for AI Data Center Infrastructure at ECOC 2026

    Marvell will present industry-first 2nm optical interconnect demonstrations at ECOC 2026 in Malaga, Spain, September 20–24, 2026, including the first 2nm 400G/lane optical PAM4, the first 2nm 800G ZR/ZR+ pluggable modules with MACsec (driven by the Libra 2nm coherent DSP), and the first 2nm 1.6T ZR and coherent-lite O-band demos.

Sep 18Fri
Sep 17Thu
  2. AMD Chips and Compute26

    Building Infrastructure for an AI World in Motion

    At the AI Infra Summit, AMD argued that the core of AI infrastructure design should not be chips or networking but a system's ability to adapt to changing demands. The piece notes that agentic AI turns a single request into a multi-step chain of retrieval, tool calls, code execution and sub-agent coordination, and should be measured by cost per completed task rather than cost per token, offering three auditable principles: adaptable, economical, and open.

Sep 9Wed
Sep 8Tue
  1. Lam Research Semiconductor Manufacturing Technology28

    Why Panel-Level Processing Could Transform Advanced Semiconductor Packaging (Semi 101)

    AI's demand for larger, more complex chip packaging is pushing the industry to explore panel-level packaging (PLP): replacing round wafers with rectangular panels to improve area utilization and scalability beyond traditional wafer-level packaging size limits. Lam Research is advancing the technology toward production readiness through tool innovation and infrastructure investments, including the Salzburg Panel Center of Excellence. The technology still faces challenges in uniformity control, yield management, and industry standards.