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Semiconductor Engineering Chips and Packaging· The SE Staff·· 4 h前AI score40

Chip Industry Week In Review

Chip Industry Week In Review

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The U.S. Department of Commerce signed preliminary memoranda of terms with Helion, Commonwealth Fusion Systems, Vertical Semiconductor, and Sibelco for up to $389 million in CHIPS Act R&D funding, covering vertical GaN and ultra-high-purity quartz technologies.

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CHIPS Act $389M to power chips, vertical GaN, materials; Micron’s memory roadmap; Nvidia expands supply chain capacity; Tenstorrent raises $1.5B; China NAND fabs; 800V power for AI data centers; Intel advances Arizona fab; China orders +$35B in Nvidia GPUs.

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CHIPS Act funding

The U.S. Commerce Department signed letters of intent for up to $389M in semiconductor R&D funding to four companies working on power devices and critical materials, including vertical GaN and ultra-high-purity quartz technologies. Under the proposed agreements, the government will receive minority, nonvoting equity stakes as a condition of the awards.

Company Award R&D Focus
Helion Up to $175M High-voltage power semiconductors for fusion systems.
Commonwealth Fusion Systems Up to $85M Semiconductors for RF plasma heating, power electronics, fusion diagnostics, and rad-hard electronics.
Vertical Semiconductor Up to $73M Vertical GaN power transistors aimed at improving power density and efficiency in AI data-center racks and other high-power applications.
Sibelco North America Up to $56M Purification and leaching technologies for ultra-high-purity quartz.

Manufacturing capacity

Nvidia expanded capacity agreements across its manufacturing supply chain, including deals with:

Advanced packaging and inspection

  • UMC and AP Memory announced a technology and manufacturing collaboration to develop silicon-capacitor power-delivery solutions for AI and HPC systems, using UMC’s deep-trench-capacitor technology to move capacitance from the board into the interposer, substrate, or landside of advanced packages.
  • As advanced packaging scales, a new report examines the challenges of moving from wafer to panel, including warpage, yield, process control, and equipment limitations.
  • Siemens and Nvidia expanded agentic AI for 3D-IC electrothermal co-design, with Siemens reporting up to 95% less engineering effort and 50× more design alternatives. The companies are also developing a PCB inspection digital twin using virtual boards and synthetic defect data to reduce manual engineering effort by up to 85% and false calls by more than 40%.


Fig.1: Agentic 3D IC engineering workflow aimed at power and thermal challenges. Source: Siemens

AI data center power delivery

Standards

China

  • Samsung Electronics and SK hynix reportedly are upgrading their China NAND fabs to produce more advanced memory, with Samsung targeting 286-layer V9 NAND production in Xi’an and SK hynix moving toward 240-layer or higher NAND in Dalian, despite U.S. restrictions on chipmaking equipment exports, according to Reuters.
  • ByteDance, Alibaba, and Tencent have reportedly placed more than $35B in orders for Nvidia’s export-compliant RTX PRO 5500 GPUs, according to Reuters.
  • China’s access to AI computing power could nearly double to 8.8M Nvidia H100 equivalents by the end of 2027, IFP estimates, although tighter chip export controls and restrictions on overseas data-center access could slow growth.

Memory

  • Micron outlined a memory technology roadmap featuring vertical HBM stacked directly on logic, targeting volume production in 2028. Its 1δ DRAM and 400-plus-layer G11 NAND are slated to ramp in the second half of 2027, with G11 targeting twice the bit density and up to 1.5× the I/O speed of G9.
  • JEDEC established a new task group to explore an LPDDR persistent-memory (PMEM) standard.
  • Samsung reportedly will use TSMC’s 3nm process for the base die in Nvidia’s custom NVHBM, while continuing to manufacture the DRAM dies itself. Nvidia reportedly asked Samsung, SK hynix and Micron to standardize NVHBM base dies on TSMC’s process to simplify performance validation.
  • Indium is expanding its Rome, New York, operations to restart U.S. processing of high-purity critical materials used in advanced memory manufacturing, backed by an investment and long-term supply agreement with Micron.

Funding

  • Tenstorrent raised $1.5B in Series E funding to scale manufacturing and deployment of its Galaxy servers and advance its AI and RISC-V CPU IP.
  • Photon Bridge raised about $11M to develop scalable multi-wavelength laser sources for optical interconnects in AI data centers.

Earnings

  • Notable: Lam Research reported record quarterly revenue of $8.2B, up 54% YoY, with systems revenue rising 62% to $5.7B amid strong AI-driven wafer-fab equipment demand.
  • Quarterly Revenue: Besi (up 114%), JCET (up 13%), MaxLinear (up 72%), Nordic (up 32%), and TI (up 28%).

By the numbers

Around the Valley: Oktobertech


Fig. 2: Infineon’s Oktobertech at the Computer History Museum in Mountain View, CA. Source: L. Allan

Quick Links To More News

In-Depth — Special report on Physical AI, the latest Manufacturing, Packaging and Materials newsletter, and scaling CPO test

Global — Fab updates, chiplet & packaging, physical AI growth lab, sovereign AI design cloud in Munich, Rapidus $, and TSMC accident

New Technologies — GPU-accelerated benchmarks, thermal management, and AI design tools.

Security — Secure MCUs, confidential bare metal, superintelligence training, DeepSeek removal, agent honeypots

Trending Video — Physical AI data movement

Research — Advances in memory, 2D transistors, and ultra-high-voltage power devices

Quantum Hardware — logical memory fidelity, cat qubits, quantum photonics and McKinsey quantum roadmap report

Workforce | Education — Qualcomm layoffs, Malaysia workforce, immigration policy impacts, and Micron bonuses in Taiwan

Events and Webinars — CASPA, PAINE, Micro26, and 5 free webinars

Global

Americas

  • Intel Foundry said construction and tool installation are underway at Fab 62 in Arizona, its sixth high-volume manufacturing fab at the Ocotillo campus. Operations are expected to begin by the end of 2028.
  • SpaceX and Tesla are aiming to begin volume production in Q3 2028 at their planned Texas Terafab, which is intended to combine advanced logic and memory manufacturing, packaging, and test. An SRAM test chip is targeted for May or June 2027.
  • Hanmi Semiconductor opened a San Jose, California sales and support hub for its advanced-packaging equipment, including HBM TC bonders.

Europe

  • UnternehmerTUM Accelerator, Infineon, and others announced plans to launch the Physical AI Growth Lab, a new equity-free development accelerator initiative for European physical AI, robotics, and industrial AI startups.
  • Cadence launched sovereign cloud infrastructure in Munich for semiconductor, system and advanced-packaging design, allowing European customers to run EDA, simulation, and AI workloads while maintaining data residency within Europe.

Asia

  • Japan’s NEDO is backing two post-5G projects: NTT Innovation Devices will lead a four-company effort on optical-chiplet mass production, and Preferred Networks and Tenstorrent will develop AI processors using chiplets, photonics-electronics integration, and advanced packaging.
  • Japan’s METI is seeking ¥400B ($2.5B) in additional government investment for Rapidus as the company works toward 2nm mass production in the second half of fiscal 2027.
  • Axcelis broke ground on a $35M ion-implantation facility in Pyeongtaek, S. Korea.
  • TSMC halted structural-steel construction work at new fab sites across Taiwan following an accident that killed four workers at its Fab 22 project in Kaohsiung, reports CNA. Authorities are investigating the incident.

New Technologies

Design automation and AI

Thermal management

Automotive

Research

Northwestern University-led researchers demonstrated current-induced switching in antiferromagnetic tunnel junctions using octupole-driven spin-transfer torque. The nanoscale devices achieved 363% tunnel magnetoresistance at room temperature, pointing to a potential approach for nonvolatile antiferromagnetic memory.

Institute for Basic Science and POSTECH researchers developed 2D transistors through selective conversion of WSe₂ into WTe₂ contacts, WS₂ semiconductor regions, and WOₓ insulating layers. The technique enabled integrated transistors and complementary logic without separately assembling different 2D materials.

UC Berkeley, Samsung Electronics, and Intel researchers introduced a nanoelectromechanically gated gain-cell architecture for embedded DRAM to address limited data retention, parasitic coupling, and the need for boosted write voltages in conventional gain-cell designs. The approach explores an alternative embedded-memory architecture as SRAM scaling slows.

University at Albany and other researchers designed and demonstrated a 15-kV silicon carbide insulated-gate bipolar transistor, becoming the first U.S. academic institution to demonstrate this class of ultra-high-voltage device. A single switch could replace multiple lower-voltage devices in high-power systems, potentially reducing circuit complexity, equipment size, and energy losses.

Security

New offerings

  • Infineon expanded its PSOC Control family with PSC3M/P6 microcontrollers for multi-motor control and power conversion, featuring post-quantum firmware security capabilities.
  • Nvidia introduced Confidential Bare Metal, extending confidential computing across Grace Blackwell and Rubin systems.

Alerts of the week

  • Two critical vulnerabilities were discovered in the widely used open-source programming language PHP. The flaws could allow attackers to take control of affected web servers.
  • OpenAI disclosed that two internal AI agents weakened misalignment monitoring while performing coding tasks, including suppressing alerts to its security team and removing a monitoring integration.
  • Siemens confirmed active exploitation of a vulnerability in Siemens Software Center, in which attackers paired a genuine signed copy of the software with malicious DLL files that were loaded at startup. Siemens said its systems, products, and update channels were not breached and issued a fix.
  • OpenCode reported a breach related to a large-scale distillation attack affecting 1.4% of OpenCode Console users. Third-party OpenAI, Anthropic, and Google API keys stored by affected users may have been exposed.
  • CISA’s alerts for the week are here.

Guidance

  • NIST, NSA, and CISA published 10 voluntary practices for responding to incidents during super-intelligence training and evaluation, including cases where agents take significant uninstructed actions that compromise security controls or human oversight.
  • DHS ordered federal civilian agencies to stop procuring and remove DeepSeek products, including products from affiliated entities and third-party products and services developed using DeepSeek implementations.
  • Institute for AI Policy and Strategy says honeypots could help detect insider threats from AI agents by using decoy credentials, servers and other traps to flag unauthorized actions. Detection has the strongest evidence base, though honeypots only cover paths where defenders deploy them.

Security technical papers

Trending Video

Scaling Data Movement For Physical AI: Physical AI poses a host of new challenges for chip engineers. These systems contain a mix of compute elements, which collectively must process a stream of real-time data, analyze it, make decisions, and still function long enough on a battery to be useful. The key here is deciding what data gets processed where, and how to minimize the movement of data.

Quantum Hardware

Quantinuum reported 99.9995% logical memory fidelity per error-correction cycle on its Helios trapped-ion system using a distance-7 color code.

Alice & Bob built and operated three cat-qubit demonstrators — two using 6-qubit chips and one using a 12-qubit chip — demonstrating noise-biased CNOT gates, repeated error-correction cycles, and a non-Clifford gate. Its measured logical error rate has not yet fallen below the error-correction threshold.

UW and PNNL researchers developed a hybrid gallium-phosphide-on-diamond photonic platform for coupling photons to silicon-vacancy qubits. They fabricated more than 600 nanophotonic cavities with a 99.5% yield and demonstrated single-shot electron-spin readout.

DGIST, Tokyo University of Science, RIKEN, et al., demonstrated a protected cat-qutrit manifold using a three-photon Kerr parametric oscillator. The team observed three-photon Rabi oscillations, three-component cat states and an energy gap separating the qutrit manifold from excited states.

McKinsey says scaling fault-tolerant quantum hardware is becoming a manufacturing challenge, requiring major expansion in lasers, cryogenics, control electronics and fabrication capacity. The firm also noted that no single qubit technology has yet emerged as the clear winner.

Workforce, Education

Qualcomm will begin notifying employees in November about global job cuts following its annual performance reviews, reports Reuters, but the company has not disclosed how many positions will be affected.

Micron will introduce quarterly profit-linked bonuses for employees worldwide beginning in fiscal 2027, following an agreement with its Taichung union in Taiwan. The company also plans salary adjustments, increased retirement contributions and additional paid leave for Taiwan employees.

Hoover Institution senior fellow Paola Sapienza argues that tighter U.S. high-skilled immigration policies, including new H-1B restrictions and proposed limits on student visas, could make it harder for the chip industry to recruit specialized engineers and researchers as countries including the UK step up efforts to attract technical talent.

Malaysia said 22,849 people have been trained for the semiconductor sector through the third quarter of 2026, toward its goal of developing 60,000 highly skilled semiconductor engineers by 2030. Training covers IC design, advanced packaging, wafer fabrication, embedded systems and automation, while the government is establishing a semiconductor academy in Penang focused on IC design, fabrication and advanced packaging.

Events and Webinars

Upcoming webinars are here, including:

Find upcoming chip industry events here, including:

Upcoming Events

CASPA 35th Annual Conference and Dinner Banquet
Oct. 23–24 | Santa Clara, CA

IEEE International Conference on Physical Assurance and Inspection of Electronics (PAINE)
Oct. 27–29 | Phoenix, AZ

MICRO 2026: IEEE/ACM International Symposium on Microarchitecture
Oct. 31–Nov. 4 | Athens, Greece

IEEE Asian Solid-State Circuits Conference (A-SSCC 2026)
Nov. 1–4 | Taichung, Taiwan

PIC Summit Europe
Nov. 3–4 | Eindhoven, Netherlands

Siemens User2User Mid-Atlantic
Nov. 4 | Laurel, MD

SWTest Asia 2026
Nov. 5–6 | Hsinchu, Taiwan

ACM/IEEE ICCAD 2026
Nov. 8–12 | San Jose, CA

GSA: 2026 WISH Conference
Nov. 10 | Santa Clara, CA

Electronica 2026
Nov. 10–13 | Munich, Germany

SEMICON Europe
Nov. 10–13 | Munich, Germany

Electronic Specialty Gases & Systems Conference (ESGS)
Nov. 10–12 | Phoenix, AZ

SC26: International Conference for HPC Networking, Storage & Analysis
Nov. 15–20 | Chicago, IL

Hardwear.io Security Trainings and Conference NL 2026
Nov. 16–20 | Amsterdam, Netherlands

DVCon Europe
Nov. 17–18 | Munich, Germany

2026 SIA Awards Dinner
Nov. 19 | San Jose, CA

Source: Semiconductor Engineering Chips and Packaging · semiengineering.com

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