SK hynix presented several next-generation memory solutions for AI servers at OCP Global Summit 2026, held October 12–15 in San Jose.
An SK hynix research team published a paper at the 2025 IEEE International Electron Devices Meeting (IEDM) proposing co-optimization of cell, non-cell, and page schemes to improve the energy efficiency of analog compute-in-memory (A-CiM) based on 3D FeNAND.
Memory supply tightness will persist through 2027, with DRAM lead times at 20 weeks versus a balanced level of 8 weeks; vendors are shifting PC DRAM capacity to server DRAM, and HDD lead times remain at 50 weeks.
SK hynix Ventures held a launch event where its employees explored technologies and collaboration opportunities with global partners. The unit works to identify promising technologies and create new business opportunities, finding paths for future growth.
SK hynix Ventures outlines its path for identifying promising technologies and creating new business opportunities. In September, the company held SK hynix Ventures Day in Silicon Valley.
Through a decade of venture investing, SK hynix has evolved its corporate VC model from "tech sensing" to "path finding," turning internal R&D, mass production and customer resources into assets startups can leverage.
As AI workloads shift toward inference and agentic AI, system bottlenecks are moving from compute to data movement. The article notes that under processor-centric architectures, fetching data once from DRAM can consume 150 to 2,000 times the energy of a simple arithmetic operation, and over 90% of system energy in large machine learning models may be spent on memory access and data movement. It leads into SK hynix's vision of building a next-generation AI memory ecosystem, arguing that GPUs/NPUs/TPUs, memory, storage and networking should be co-designed as a single system.
In part three of its AI Infrastructure Insight series, SK hynix notes that power supply and thermal management have become core requirements that AI data centers must consider from the earliest design stages.
At the TSMC OIP Conference held in Santa Clara, California, SK hynix showcased its next-generation memory portfolio and won the Partner of the Year award (3DFabric-HBM Integration category) for the second consecutive year.
NAND suppliers are shifting capacity toward enterprise SSDs on recovering demand, but eSSD lead times still stretch to 16 weeks, far above the 8 weeks of a balanced market, and overall supply remains insufficient. Other highlights this week include reports that SK hynix is in early talks with Intel about producing memory chips in the US, and Huawei moving its Ascend 960DT up three quarters to early 2027 to catch up with NVIDIA.
SK hynix took part in AI Infra Summit 2026, held September 15–17 in Santa Clara, USA, presenting next-generation AI memory solutions under the theme "New Spectrum." Attendance was about 6,000, double the previous year.
TrendForce says 4hi HBM samples will enter supplier views in early 3Q26, with NVIDIA and other AI chip vendors evaluating low-stack configurations to cope with the HBM shortage. The spec has real use cases in edge AI scenarios like autonomous driving and robotics; SK hynix previously supplied HBM2E to Waymo in 2024 with automotive certification, but near-term demand contribution remains very low.
On September 8, SK hynix held its 2026 Future Forum at the SUPEX Center on its Icheon campus, under the theme "The Golden Age of the AI Era: The Moment for AI Memory Solution Creators to Change the World," discussing AX (AI transformation) trends and the direction of memory technology.
In its AI Ecosystem series, SK hynix notes that as AI shifts from pretraining to inference and agentic AI, the system bottleneck is moving from GPU compute to where data resides and how it flows. The memory wall proposed by Wulf and McKee in 1994 is becoming reality: AI accelerators now reach petaflops of compute, but memory read speeds cannot keep up, leaving many compute units idle waiting for data. The response is to increase memory bandwidth or move memory closer to the processor.
In its AI Infrastructure Insight series, SK hynix explains that AI performance cannot rely solely on the compute of accelerators like GPUs; it also requires memory bandwidth, networking, storage and cooling to work in concert.
On August 25, at Dell Technologies Forum 2026 (DTF) held at COEX in Seoul, SK hynix showcased an AI memory portfolio spanning the full memory hierarchy, continuing its collaboration with strategic partner Dell.
Hybrid bonding is becoming a key interconnect technology for next-generation products such as HBM, NAND, 3D-stacked DRAM and AI accelerators. It eliminates bumps and uses direct Cu–Cu bonding, shrinking chip pitch from about 100µm with solder balls and about 20µm with micro-bumps to under 1µm.
SK hynix, together with researchers from UVA, UIUC, NTU, MIT and Yonsei University, has published a co-packaged optics (CPO) technology roadmap in Nature Electronics. The corresponding authors are Seunghoon Hong, SK hynix AI Infra Team Lead, and UVA professor Kyusang Lee.
As test-time scaling rises, the AI industry's focus is shifting from training to inference, bringing structural changes to the memory hierarchy. In the first half of 2026, NVIDIA and Google respectively launched CMX, Rubin integrated Groq LPX, and the TPU v8i designed for inference (with 72 GB more HBM3e and 384 MB SRAM than the TPU v8t).