Semiconductor Engineering 圆桌：CPO 测试面临连接器与激光源未定的动态变化难题

Key Takeaways:

• The industry is busy developing different connector designs and laser sources, while massive data centers with the first levels of CPO are being built.
• In the absence of design-for-test, companies have to test each individual waveguide, resonator or photodiode, which is inefficient and does not scale.
• Optical components are much more sensitive to slight offset than electronic components, making issues like thermal and warpage particularly troublesome.

Experts At The Table: The steep data center build-out contains an increasing amount of near-packaged optics (NPO) and co-packaged optics (CPO), putting pressure on test manufacturers to produce high-volume manufacturing tooling. Semiconductor Engineering sat down with Matt Griffin, senior product manager for optoelectronics test at Teradyne; Ira Leventhal, vice president of research and venture at Advantest America; Dave Armstrong, fellow at ISE Labs, a subsidiary of ASE Group; and Kazuo Yamaguchi, silicon photonics researcher and engineer at Keysight Technologies.

Fig. 1: (L-R): Teradyne’s Griffin; Keysight’s Yamaguchi; ISE Labs’ Armstrong; Advantest’s Leventhal.

SE: Some people liken the testing of optical devices to testing electronic devices several decades ago. What are the most significant challenges associated with testing photonic devices?

Griffin: There are two key changes we’re making to the test cells to support co-packaged optics. One is the optical instrumentation itself at the wafer, optical engine, or package level. The second is the automation. So how do I optically interface with the device under test (DUT)? That could be a fiber alignment at wafer, a connector alignment, or receptacle alignment at the package or optical engine level. This is what needs to change to enable high volume. Some of the photonics engineers will say, ‘Well, what’s the big deal? I’ve been testing optical transceivers for 20 years. I’ve been designing optical transceivers for 20 years.’ The difference is the scale of going to high-volume manufacturing, where you’re deploying many testers on a test floor. You want to support high-volume software, data analysis, and test programming capabilities, so it’s not as simple as bringing rack-and-stack instrumentation onto a test cell or designing your own custom optical alignment system like you would in your characterization lab. That is really where the challenges lie.

Leventhal: It really comes down to maturity level, and if we wind the clock back 40 years, with each generation of electronics, there’s some new capability being added. In the beginning of my career, ATE was strictly digital test. But we kept getting greater levels of integration, bringing together digital, analog, mixed-signal, RF, and now millimeter wave, in a single package. Photonics is yet another progression of new technology. There’s a less mature ecosystem for the optical part of the test content, and that needs to mature to enable us to truly bring up this technology at scale. For example, customers are still trying to determine which connection technologies they’re going to use and what laser sources they’re going to use. A lot is still evolving. I don’t see this as a fundamentally different challenge, but the signal is optical and not electronic, so electrical engineers are looking at things like polarization extinction ratio, for example, so it takes that next level of learning to evolve this to HVM.

Armstrong: Ira hit on an important point. A lot of what we’re doing harkens back to the old days of digital logic before we had scan test. At that time, a lot of people were trying to take rack-and-stack or bench equipment and use it for production test, which tended to be clunky, cumbersome, and slow. Then we got design for testability (DFT) integrated into the logic. We haven’t done DFT for optical. People are trying to deploy some PRBS (pseudo-random binary sequence) type approaches, which have existed in logic devices for a while, but in large part we don’t have DFT, so we have to test each waveguide component, ring, modulator, etc., one at a time, and it is slow and laborious. There’s a lot of different perspectives on what needs to be tested and how to test it, and I’d say one of the biggest challenges is, as Matt alluded, we don’t have a hybrid engineer. We’ve got two different camps of people who have a hard time learning each other’s core capability, so we have to get people on the same page, educated similarly both for electrical and optical, with similar standards in place.

Yamaguchi: Optical alignment must be extremely precise and can slow down testing. For this reason, using an optical probe card would be ideal but is difficult — not only because of the non-contact mechanical implementation, but also because optical calibration is needed to make reliable and traceable measurements. The multi-channel optical connectivity with the FAU has design variation from unit-to-unit and channel-to-channel, resulting in channel-performance uncertainty. For example, a measurement on channel 1 of a waveguide is different from the same measurement on channel 2. A slight offset due to pitch and x,y mismatch causes an optical alignment offset, which is more impactful than a similar offset at electrical probe.

SE: How does the addition of photonics change test flows?

Armstrong: We all share a very similar view of insertions. Insertion one is for PIC (photonics IC) testing. Insertion two is wafer-level optical engine testing. Insertion three is die-level optical engine. Insertion four is module test, and insertion five is system-level test. You can add insertion 1.5, wafer-level burn-in, a stability bake of your optical components, and it’s a must for lasers to get rid of infant mortality. PIC testing is certainly done broadly today, although some people who have the most experience in the market say it may not need to be done in the future. Optical engine testing is a must, and that’s where most of the effort is. So insertions two, three, and four feel like a must for the hyperscalers, which feels like a follow-on effort to what hyperscalers have been doing for years with a large ATE high-power test of the heterogeneous integration.

Griffin: I’ve been working in this space for about ten years, and almost every insertion has felt like the most important one at some point, depending on which customer or which part of the market you’re talking to. Our goal is to provide test solutions across all insertions and give our customers the flexibility to shift coverage as they gain more insight into the volume manufacturing flow and where they need to optimize. One critical insertion happens before you attach the optical engine to your high-performance compute device, because you don’t want to package lower-cost optical engines with an extremely high-value ASIC and cause yield loss on that entire package. At some point, customers want to do a full functional mission-mode test of that entire CPO module, and we see some variation between customers wanting to do it on ATE versus SLT, or possibly both. You have to optically connect to the device, potentially between 4 and 32 connectors. We’re seeing test requirements at 1 to 8 kW for the center die and 10 to 30 W for each optical engine. So thermal management of that device is critical for customers.

Yamaguchi: Much of what we measure is already defined by industry standards, and those standards are being written right now, in parallel with the CPO/NPO manufacturing test discussions. I agree with Matt that each customer decides where coverage sits in the flow, based on their own technology and manufacturing experience. But the fundamental test parameters and compliance metrics are largely the same ones used for optical transceivers for years. What changes with CPO and NPO is which insertion performs them, and how early.

Leventhal: It’s important to identify what things are being tested right now due to a lack of maturity of the ecosystem versus tests that are fundamental to understanding whether technology is working the way it’s supposed to. As electro-optical systems and packages mature, we’re going to see steps go away over time because the processes are getting dialed in. Matt talked about the amount of power, which is huge and just getting bigger. But you also have warpage of large-scale packages. If you’re coming in with a connection mechanism and the part is warped, that connector is not going to be where you expect it to be, and you can shear the connector off. That’s an example of something that will get dialed in. But you will have more burn-in insertions because things are not optimized from a manufacturing and test standpoint. As tests go away, it may be replaced by other ways of getting to the important information, like DFT, which is critical for that. We’re not going to get to maturity without it.

SE: Do there appear to be certain leading connector designs?

Griffin: That’s probably more of a question for the package designers. I think a handful of customers will go to volume and drive specific connector designs over the next one to two years. That should give us a better sense of what propagates in the market.

Leventhal: As test system providers, we have to work with whatever our customer ends up using. But we definitely see a wide disparity in terms of the types of connector designs, and they all have their pros and cons. Certain connector companies have put a lot more focus on the repeatability and reliability of that connection. Other customers have put more focus on securing the best optical performance. Another consideration is the flexibility of the connector in terms of the FAUs that it can work with, because there are predictions about FAU companies not being able to keep up with the capacity demands of the industry, and people will need second sources. If that second-source FAU uses a different connector type, that becomes really messy.

Armstrong: It’s definitely a moving target problem, no question. And keeping up with where the industry is going, I’m now seeing people ask about two-row fiber FAUs. We’re seeing customers talking about implementing hundreds of fibers in a single FAU. It’s kind of scary in terms of how it’s ramping up before we have figured out the last challenge. Additionally, if we’re talking about testing in production, I should talk about cleaning. Each cleaning of the setup is going to generate a certain amount of dust, and dust is the enemy in optical testing. Having a way to effectively clean the optical connector FAU in an automated fashion is critical.