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#算力基础设施

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Oct 15Thu
  1. Semiconductor Engineering Chips and Packaging51

    How Close Are We To Fully Autonomous Chip Design?

    In a SEMICON West interview, Synopsys CEO Sassine Ghazi said the company has deployed more than 40 task agents, and some customers can hand a spec to the Synopsys Autonomous Agent to automatically generate and verify RTL — a process that used to take multiple engineers several months — though fully autonomous chip design remains out of reach today.

  2. Semiconductor Engineering Chips and Packaging46

    Agentic AI Alters The CPU-GPU Balance

    Agentic AI requires extensive if-then-else decision orchestration, work handled by CPUs; industry estimates suggest the CPU:GPU ratio could rise from roughly 1:4 in typical LLM scenarios to nearly 1:1, pushing up both CPU demand and prices.

  3. Semiconductor Engineering Chips and Packaging52

    Why Open-Weight AI Matters

    Semiconductor Engineering examines how open-weight AI models affect chip architecture, noting the focus is shifting from peak TOPS to memory bandwidth and capacity, sustained throughput, numerical format flexibility, and deployment security.

Oct 14Wed
Oct 12Mon
Oct 11Sun
Oct 8Thu
  1. Semiconductor Engineering Chips and Packaging24

    From Silicon To Systems: Redefining Competitive Advantage, Part 3

    Advantest's Dong Ong talks with ISIG co-founder and CEO Salah Nasri about competitive advantage in the semiconductor industry over the next decade. In the AI era, industry value is shifting from transistor process nodes and single chips to advanced packaging, system integration, software and platform ecosystems; performance depends on how efficiently an entire system moves data, manages energy and coordinates compute, and future winners will be vendors that combine technology, platforms and partnerships into a value system.

Oct 7Wed
Sep 3Thu
  1. SK hynix Memory Technology37

    [AI Ecosystem] The real bottleneck: Data, not compute

    In its AI Ecosystem series, SK hynix notes that as AI shifts from pretraining to inference and agentic AI, the system bottleneck is moving from GPU compute to where data resides and how it flows. The memory wall proposed by Wulf and McKee in 1994 is becoming reality: AI accelerators now reach petaflops of compute, but memory read speeds cannot keep up, leaving many compute units idle waiting for data. The response is to increase memory bandwidth or move memory closer to the processor.

Aug 10Mon
  1. TrendForce Insights Semiconductor Industry Insights44

    China's Aggressive Push for High-End AI Chip Autonomy

    TrendForce supply chain research shows that despite reports China may relax import restrictions on the NVIDIA H200, actual H200 entry into China remains highly uncertain. Under export controls on high-end GPUs, the Chinese government is actively promoting domestic AI chip adoption this year, and the local ecosystem is gradually maturing in advanced process nodes, advanced packaging, and thermal management. China's AI infrastructure is shifting from reliance on foreign GPUs toward a dual-track model of domestic GPUs plus in-house ASICs.

Jul 30Thu