Quadric 通用神经处理器 GPNPU：单一可编程架构运行生成式 AI
Generative AI On A General-Purpose Neural Processor (GPNPU)
Quadric 在 IEEE 论文中提出通用神经处理器 GPNPU，这是一种以可配置 IP 交付的单可编程处理器架构，将标量、向量与矩阵执行统一到一套 ISA 和 C++/Python 编程模型中。
A single processor architecture that unifies scalar, vector, and matrix execution in one ISA and one C++ programming model.
Generative-AI workloads evolve on a quarterly cadence, with novel attention variants, quantization formats, and routing schemes appearing faster than fixed-function neural-processor silicon can be respun. This paper presents the General-Purpose Neural Processor (GPNPU): a single programmable processor architecture, delivered as configurable IP, that unifies scalar, vector, and matrix execution in one instruction-set architecture (ISA) and one programming model accessible from standard C++ and Python.
Read more in Quadric’s IEEE paper here.
Fig.1: Chimera GPNPU core block diagram. A single instruction stream feeds the scalar unit and the 2D SIMD PE array; per-PE detail (right) shows the 32-bit ALU, configurable MAC bank, local register-file SRAM (LRM), and neighbor-communication path. All on-chip memory (LRM and L2) is software-managed. Source: Quadric
来源：Semiconductor Engineering 芯片与封装 · semiengineering.com