AI 图像增强改进倒装芯片互连缺陷检测（MCL、PVA TePla、ASE）
AI Image Enhancement Improves Detection Of Flip-Chip Interconnect Defects (MCL, PVA TePla, ASE)
Materials Center Leoben、PVA TePla 与 ASE 的研究团队发表了一项基于 AI 的图像增强工作流，专门用于改进扫描声学显微镜（SAM）图像质量，以提升倒装芯片超低 K 层“white bumps”裂纹缺陷的检测能力。
Researchers at Materials Center Leoben, PVA TePla, and Advanced Semiconductor Engineering (ASE) published “AI-Based Image Enhancement Improves Detection of Interconnect Defects in Microelectronic Packaging.”
Abstract Excerpt:
“Traditional failure-analysis (FA) methods face growing challenges due to the increasing miniaturization and complexity of modern semiconductor devices. In particular, the detection of cracks in the extreme low K layers of flip-chips, utilized in advanced packaging architectures at the back end of line (BEOL), is challenging. To improve detectability of these so-called “white bumps”, we propose an AI-based image-enhancement workflow, specifically tailored to improve scanning acoustic microscopy (SAM) images.”
Find the technical paper here. October 2026
Wilhelmer, R., Djuric-Rissner, T., Czurratis, P. et al. AI-Based Image Enhancement Improves Detection of Interconnect Defects in Microelectronic Packaging. J Fail. Anal. and Preven. (2026). https://doi.org/10.1007/s11668-026-02537-z. Open access.
来源： Semiconductor Engineering 芯片与封装 · semiengineering.com