Silicon Photonic Modulator Reaches 200 Gb/s PAM4 With Reduced DSP (Science Tokyo, Yokohama, AIST, PETRA)
Silicon Photonic Modulator Reaches 200 Gb/s PAM4 With Reduced DSP (Science Tokyo, Yokohama, AIST, PETRA)
A research team from Institute of Science Tokyo, Yokohama National University, AIST and PETRA has published a paper demonstrating a silicon photonic crystal waveguide slow-light modulator with a built-in electro-optic equalizer, achieving 200G/λ per channel with low-voltage operation.
Researchers from Institute of Science Tokyo, Yokohama National University, AIST, and Photonics Electronics Technology Research Association (PETRA) published a technical paper titled “Reduced-DSP 200G/λ Low-Voltage Slow-Light Silicon Modulator Enabled by Built-In EO Equalizer.”
Abstract Excerpt:
“Multi-Tb/s optical interconnects for artificial intelligence data centers necessitate high-speed, energy-efficient, and compact transceivers. However, conventional silicon Mach-Zehnder modulators are fundamentally limited by low modulation efficiency and large physical dimensions that typically extend several millimeters, requiring high-swing drivers and power-intensive digital signal processing to achieve data rates exceeding 100 Gb/s per lane. Here we show a silicon photonic crystal waveguide slow-light modulator that overcomes the bandwidth-efficiency trade-off via a built-in electro-optic equalizer.”
Find the technical paper here. October 2026
Kawahara, K., Tsuchizawa, T., Yamamoto, N. et al.Reduced-DSP 200G/λ low-voltage slow-light silicon modulator enabled by built-in EO equalizer. Nat Commun 17, 10446 (2026). https://doi.org/10.1038/s41467-026-78128-1.
Source: Semiconductor Engineering Chips and Packaging · semiengineering.com