半导体奇点：当 AI 开始加速加速 AI 的芯片

AI is entering the inner loop of semiconductor engineering by reducing the effort required to develop software, operate software tools and carry out engineering analysis.

Ray Kurzweil described the broader pattern as the Law of Accelerating Returns: accumulated technical capability helps create the next computing paradigm. In my recent white paper, The semiconductor singularity: Accelerating IC innovation with AI, I applied that idea to semiconductor engineering. Better computing improves the tools used to design and manufacture semiconductors, and those tools help create the next generation of computing.

Figure 1 places that loop in the longer history of computing. The technologies change, but each generation contributes tools, knowledge and capacity that help create its successor.

Fig. 1: Successive computing paradigms have built the technical capacity used to create the next generation.

Lowering the effort required for the next experiment

Progress in semiconductor engineering never follows a smooth exponential curve. It advances when a bottleneck is overcome sufficiently for engineers to try something that previously cost too much money, time, computation or organizational effort.

I saw this firsthand with machine learning in computational lithography. Early demonstrations were exciting, but production adoption required developers who understood both ML and semiconductor applications, representative data, model management, IP controls and customer confidence. Production adoption followed only after the model, data, deployment environment and customer requirements matured together.

Generative AI relieves many of the user-complexity bottlenecks characteristic of EDA flows. When I created my original SPIE machine-learning course for lithography, the prototype work took roughly 200 to 300 hours, including some help generating training data. In a later experiment, I used generative AI to recreate and expand a surprising amount of that prototype functionality in roughly 30 hours. These were notebook-level prototypes, not production computational-lithography tools, but the change in exploratory effort was striking.

The practical effect is more engineering exploration within the same schedule. Experienced silicon engineers can examine more alternatives and produce more usable results while spending less time on software and workflow mechanics.

Extending the reach of engineering expertise

Agentic AI extends this effect from delivering predictions or analyses to carrying out sequences of engineering work. The LLM interprets intent, assembles the workflow, retrieves relevant context and coordinates specialized tools. Engineering authority remains in the EDA tools, models, qualified data and deterministic analysis.

Semiconductor workflows have traditionally depended on experienced engineers who know which analysis to run, which data matters, when a result is credible and when something requires closer examination. That expertise takes years to develop and cannot expand as quickly as computational capacity or engineering demand.

Agentic systems can increase the reach of that expertise. In computational lithography, an agent might collect recent SEM data, configure model calibration, invoke the appropriate analysis, inspect convergence and runtime, and return exceptions to the engineer for judgment. More computation, data and tool activity can operate under the direction of each expert.

Siemens Fuse EDA AI implements this architecture by connecting AI models to EDA tools, engineering knowledge, specialized languages and data formats.

Manufacturing connects models to physical evidence

Computational lithography shows how this works. A fab collects wafer and metrology data, calibrates models, uses those models to drive correction, measures the resulting silicon and feeds what it learns into the next calibration and process change. The model improves through repeated comparison with physical evidence.

Different parts of that loop require different computational methods. Physics-based simulation predicts physical behavior. Qualified models, rule decks and deterministic verification establish engineering and signoff authority. Specialized machine learning supports prediction, classification and optimization. Generative AI improves access to knowledge and tools. Agents coordinate workflows. Accelerated computing expands the analyses that fit within practical schedules.

The result of these workflows is usually the conversion of physical understanding and manufacturing observations into evidence-backed engineering interventions. Simulation directs exploration, metrology records what happened, models reconcile prediction with observation, and engineering action changes the design or process.

As EDA tools, manufacturing systems and digital twins become accessible to agents, this loop can operate across more of the workflow. Agents can explore design-technology tradeoffs, run simulation and computational-metrology flows, evaluate alternatives and organize evidence for the next engineering decision.

Trust is engineering infrastructure

As engineering cycles accelerate, the value of trust increases. AI can generate hypotheses, assemble workflows and explore alternatives quickly. Semiconductor development advances through evidence that engineers can responsibly act on: verified designs, qualified models, measured silicon and data whose origin and applicability are understood.

Agentic EDA needs engineering context, secure data access, traceable actions, deterministic authority and human control over consequential decisions. These properties belong inside the workflow and provide a foundation of trust.

A Calibre nmOPC model earns trust through calibration against physical metrology data and continued comparison with what appears on the wafer. The model, calibration data, process conditions and physical evidence together establish where the model can be relied upon. As conditions change, the model is recalibrated and the evidence base grows. AI-enhanced metrology tools such as Canopus can strengthen that foundation by increasing the quantity and quality of SEM data available for calibration.

Calibre, together with foundry-qualified rule decks and verification flows, establishes that a design complies with the physical requirements of manufacturing. Agents can orchestrate more work and explore more possibilities, while trusted engineering tools determine which results are allowed to move forward.

With access to more tools within a well-designed trusted software foundation, engineering analysis may encounter bottlenecks in the larger organization or ecosystem. The time required to establish data access, protect IP or authorize a production change can become the limiting factor on acceleration. Reducing the time required to establish access, protection and authority becomes the next engineering problem.

Figure 2 summarizes how the limiting constraint moves as the engineering workflow accelerates. Physical evidence, deterministic authority, data access, IP protection, validation and human control account for a larger share of the remaining cycle time.

Fig. 2: As development and analysis accelerate, physical evidence, deterministic authority, data access, IP protection, validation and human control account for more of the remaining end-to-end cycle time.

The singularity is an accelerating engineering loop

Better hardware expands AI capability. AI expands what engineers can explore and automate. Manufacturing supplies physical evidence, and verification establishes which results can move forward.

Each improvement changes the limiting constraint. The semiconductor singularity is the continuing acceleration of this engineering loop: identify the next constraint, preserve authority where physics and signoff require it, and use evidence from silicon to improve the tools and decisions that create the next generation of hardware.