Synopsys CEO 谈自主芯片设计进展：AI 智能体已能从 spec 生成已验证 RTL

Key Takeaways:

• Autonomous chip design is advancing, but human engineers remain essential — at least for now.
• Systems companies are pressuring EDA to shorten chip design cycles so they can keep pace with rapidly changing AI workloads.
• Advanced packaging, physical AI, and digital twins require broader co-analysis and co-design for multiphysics.

Sassine Ghazi, president and CEO of Synopsys, sat down with Semiconductor Engineering to discuss how AI is transforming chip design and engineering. What follows are excerpts from a keynote interview at SEMICON West this week, which was conducted before a live audience.

SE: The big change over the past year, and really the big story right now, is AI. We’re processing more AI data. Chips need to run faster. They need to run cooler. Do we really need to rethink how we’re developing these chips?

Ghazi: Absolutely. Actually, we started talking about how to re-engineer engineering, because you need to co-design and optimize across multiple intersections, starting at the physics level, material, process technology, architecture, design, along with the software and the model itself, because the model itself is what’s defining the workload, and how do you optimize along that stack?

SE: So where does AI actually fit into chip design? We’ve been dealing with computational software since what, the 1980s?

Ghazi: Yes. Around the 2016 time frame, we introduced reinforcement learning in a number of our technologies and tools to take advantage of a large space of parameters that you need to optimize, and to use AI to assist the human engineer in optimizing that large space. Today, we’ve moved from an assistant to an actual orchestration of multiple task agents. We have more than 40 task agents. Those task agents are experts of the tools, where you feed them all the knowledge, the capabilities that the tools need in order to optimize for a certain outcome. So those are specific task agents. The magic that has happened over the last year or so is the advancement in intelligence and reasoning of these models. You have long-horizon orchestration, where these models can orchestrate multiple agents, and all you have to do is give it an outcome you’re trying to achieve. That’s where we are today. So it is truly amazing the progress that we’ve made.

SE: Where do you see this going? We’ve gone from GenAI over the past four years to Agentic AI. What comes next?

Ghazi: You can look at it this way. We started from an assistant copilot, to generative capability, to now what we’re describing as long-horizon autonomous agents, where instead of giving a prompt, you give an outcome, and you expect that model is able to reason and trigger actions for multiple agents to achieve that task. So it’s autonomous engineering. Now the question typically comes up then, ‘What happens to the human engineer? What is the role that they play, and is that a risk for the industry?’ Actually, I don’t see it that way at all. Today, there’s a massive demand for more companies to define and specialize silicon, to customize silicon. And if you think about the challenges that the industry is having, it’s the shortage of human engineers to be able to architect, take a spec, define the silicon, and drive toward an outcome. So the whole autonomous orchestration is a very positive thing for the industry, where you still need the human judgment to define the architecture, to guide, and to sign off the final check before you go into product manufacturing.

SE: At the Converged conference earlier this year, some of the big chipmakers said that they will be able to develop chips with no human in the loop. Is that realistic? And if so, where does the human play? Is it a matter of, ‘Check this, make sure it’s accurate, it actually works as I expect?’

Ghazi: That’s the ambition. Today, we do have a number of engagements and technologies where you can start with a spec. The spec comes from a system company. The system company can be — think of any hyperscaler, any frontier AI lab, any EV automotive, drone. Think of a system company defining a spec. That spec is based on the end product. At some point, you need to translate it into the electronic spec. Today, we have engagements where the customer can provide a spec to Synopsys Autonomous Agent, and it moves it to a verified RTL, which is the starting point for the chip design. That process used to take many months for many human engineers, to go from the spec to writing the RTL, verifying the RTL, and ensuring that it can be physically implemented and manufactured. So today we have that step being done autonomously. We have it. We have a number of customers engaged in it now. With the intelligence and the reasoning, can it expand into the physical implementation, physical verification, into the sign-off of the chip? I have no doubt we’ll get there. Is this here today? No. Is there an ambition to have more autonomy in that workflow? Absolutely.

SE: So do agents now become the new IP?

Ghazi: Maybe a different way to ask the question is, ‘What will be the core IP for Synopsys? Is it the tool itself? Is it the agent who is the expert on the tool and needs the tool in order to perform a task?’ So today, the model is fantastic at reasoning and exploring. You still need the tool, i.e., the agent, in order to generate and to validate. Because you can generate an outcome, you can explore many design options and possibilities. But at the end, you have to decide on one implementation that provides the best performance, power, cost, etc.

SE: The reason I ask that question is that when Synopsys was developing — and still is developing — IP, almost all of that ended up as custom IP because your customers demanded that it fit into something. Do AI agents now fill that because they do adapt?

Ghazi: There is what I describe as the classic EDA products — the tools used for design. And then there’s the IP, which is the interface IP. These are needed to connect chip-to-chip and the chip to the system. Those are increasingly customized. Let’s say you’re a hyperscaler. You’re trying to optimize your chip and customize it for a specific workload in order to achieve performance, power targets, etc. If the interface IP is general, and not customized, then you’re losing competitiveness. The area may not be optimized. The performance is not optimized because it’s general-purpose IP.

SE: Changing topics, there’s a whole new market opening up in physical AI, but there’s a lot of dependencies that you have to think about. There’s a lot of data orchestration, and it’s a brand new opportunity. Elon Musk was promoting this as a $25 trillion to $30 trillion opportunity [just for Tesla] as we go forward. What do you see?

Ghazi: As AI expands from digital to physical, the silicon is powering both. You need customized silicon for both. The moment you start moving to physical application, it’s software-defined. The automotive industry has been heading down that path for at least 7 to 10 years with the software-defined vehicle. As the vehicle becomes autonomous, you need to model not only the electronics and the physics of the end product. You need to model for the environment in which it’s operating. So it’s a multiple optimization opportunity between silicon, the system itself — that includes multiple engineering of structure, fluid, the actual mechanical system — and how to model the environment in which that system is going to operate. So it’s a massive engineering opportunity, and we play from the silicon to the system. The system is through the acquisition of Ansys. We have the multi-physics sign-off. If you want to sign off either a chip or an end system, i.e., a car, a robot, anything that is an intelligent system, you need to make sure that you’re not overdesigning the product. You’re not overbuilding it. So how do you design it just right and be able to sign off across multiple physics before you commit to manufacturing?

SE: And this isn’t just a system of systems. It’s a system of heterogeneous systems, right?

Ghazi: Yes. The hardest part for me to describe is the definition of ‘system’ at multiple levels of abstraction, because an advanced package is a system. But that’s a component when you start thinking of a rack. It becomes a component as you’re thinking of a subsystem or a data center. So it’s a different level of abstraction of a system.

SE: One of the ways that people have talked about controlling AI — and we’ve all heard the stories about escapes from sandboxes — is with digital twins. We’ve been hearing about digital twins for probably a decade at this point. Has anybody actually produced one? And if not, what’s the problem?

Ghazi: The concept of digital twin or virtualization has existed for a very long time. Actually, Synopsys made two acquisitions about 15 or 17 years ago in virtualizing chips, meaning creating a digital twin for a chip in order for the customer to start designing software before the chip is manufactured. So it gives the customer optionality of models to determine which chip is most appropriate for the system. Now, if you go to the system or a digital twin of a whole car, we do have customers that are able to create a digital twin for the entire electronics — a digital twin to do crash testing for the material and the structure and the physics of the car, so you don’t have to do physical prototypes and crash testing. There are parts of digital twins for different engineering domains. Today customers are using it. But is there a digital twin that encompasses the electronics, the physics, the environment in which that system operates, that today is available and broadly used by customers? Not really. But that’s part of the journey. And I’m not sure how you can build a future sophisticated intelligent system without having a digital twin. It will take you forever, and the cost will be astronomical.

SE: But it’s still the classic divide-and-conquer, right?

Ghazi: Yes, because unless you’re starting completely from scratch, you typically start from the prior design and architecture, and you move to the next one. The one place I’m always amazed at, because they started from scratch, is China when it comes to robotics and EVs. There are many customers I visit in China, where the whole company started two or three years ago, and they started with a fully digital approach for design. The silicon just taped out, they put it on a board, they put it in a car or whatever the end system is, and the software is running within weeks. That’s a transformation in the way our customers are doing engineering. So is it possible? The answer is yes. But what are the constraints and the starting point in order to motivate an established engineering company to jump into that new way of working?

SE: And also, where in the lifecycle of a car does this actually play? Because this takes an enormous amount of computing.

Ghazi: Yes, but if you think of the traditional OEMs, they create a new platform every four or six years — the platform meaning the whole car itself. The example I just gave happens every nine months to a year. So it’s almost at the same rhythm where as they’re updating the electronics, they’re updating the whole car. Of course, it takes a lot of compute investment, but at the end, net-net, your end product is more differentiated and you are at a much faster rhythm and pace of innovation.

SE: And you’re also monitoring the health of these systems as they go forward too, right? Can you imagine a 3 nanometer chip lasting 15 years in a car?

Ghazi: The more you architect the system as individual components, where you’re able to validate it as a whole system, then it does give you the optionality based on cost, based on supply chain, based on many, many vectors that you can optimize.

SE: Let’s shift topics here. 2026 was supposed to be the year of the 3D-IC. Is it real?

Ghazi: Yes. There are many chips sitting in data centers today that are 3D-ICs. It’s complex. There are challenges beyond the electronics where customers and manufacturing are struggling. It’s not the architecture of the electronics. It’s the physics and mechanical effects of that 3D-IC. What’s happening as you’re running the workload at a high level of intensity, and as it’s intended, is that you’re running into thermal [issues] inside the package. It’s causing some of the chiplets to warp or to crack. So it’s a mechanical challenge. The industry is absolutely working toward addressing it early, during the architecture of the 3D-IC, along with the workload that is running on them. That was actually the key thesis for Synopsys to acquire Ansys — how do we bring that physics simulation early during the design phase so you can take this into account, because absolutely the future is a heterogeneous integration of multiple chips.

SE: And it’s a programming nightmare, because now you’ve got things like, ‘Okay, we’re going to have a spike in heat, we’re going to have a spike in this computing, and the spike is going to occur every 3 milliseconds.’ So now, what do we do in between those 3 milliseconds? How do we cool it down?

Ghazi: Yes, actually, this is where I mentioned the workload. Designing and architecting the system, the advanced package and multi-die system, with the context of the workload becomes very essential. This is where many surprises happen in the field, where there’s a corner case you did not take into account, and that system overheats and breaks. So it’s an optimization along the stack, from the software to architecting the actual package, to implementing it, and taking into account both the physics and the design.

SE: Let’s add one more element in here, which is that the AI itself may be changing as well. So you go back and think of what you were running in Gen AI, or you’re running in agentic AI, and now the queries are getting more complicated, as well.

Ghazi: And that’s why you have every system company trying to take control over their silicon development. It’s not because the semiconductor industry is not doing a fantastic job to optimize their silicon to a specific workload. But at the pace in which things are moving, the model is changing every three to four months. You cannot have silicon being updated every two to three years. And many of our semiconductor customers are pushing to reduce it from 18 months, 16 months, 14 months, to a year. Many of the system companies are pushing us to say how we can leverage AI and change the spec-to-tape-out to shorter than a year, shorter than nine months? Where are the bottlenecks? How can we design silicon that is very specific for a workload that we’re defining?

SE: Or one that can adapt as you go forward, right?

Ghazi: Yes, the whole programmability of either a chiplet or the entire chip itself is the direction, but I’m not seeing it adopted too much by system companies compared to, ‘I need the speed in defining a spec and customizing that silicon.’ And by the way, that silicon lifecycle is not more than two years to three years, so it’s not like they’re customizing it with the intention of keeping it for multiple generations of a model. So it’s the ability to optimize and deliver to the silicon at a much faster pace, and [for] the life of that silicon, it’s okay for it to be at a much shorter duration sitting in whatever application that they’re driving.

SE: Given all this change, what worries you? What keeps you up at night?

Ghazi: The pace, the pace, the pace. You know, there’s a massive complexity that is going on. In our industry, we’ve collectively done an amazing job to innovate and to really deliver magic. I’ve never seen a pace and system-level co-design and complexity [like] what we’re dealing with right now. The companies that are able to transform from a classical traditional workflow to adopting that next workflow — it’s very easy to put it on a PowerPoint slide [but] it’s very hard for a company to deliver the current commitment to their customer and transform that same engineering workforce to deliver that future of intelligence married with the physics married with the product differentiation that each company is trying to deliver.

SE: Does it make it hard to figure out where to place your bets? If you look at EDA, it has always exceeded almost every other hardware company that’s out there in terms of how much investment [as a percentage of revenue] you put into R&D.

Ghazi: As a percentage of revenue, yes, EDA has always had the need to invest a bigger and bigger percentage of revenue to keep up. There is an opportunity with AI. I have not seen yet that it’s able to tame it [to be able to] say right now the investment will go down. So the investment that we’re making is actually continuing to increase, not decrease.