Shrinking Hybrid Bonding Pitches Push Inspection Limits

Key Takeaways:

As interconnect pitches between hybrid bonds approach 5 µm and below, 50 nm particles and surface contamination, as well as nanometer-scale topography variation, can cause bonding failures. Inspection tools must distinguish yield-killing defects from harmless variations.
Pre-bond surface planarity and cleanliness are critical to yield. CMP must control copper recess to just a few nanometers while minimizing roughness, scratches, and particles. Chip manufacturers turn to optical inspection, interferometry, AFM, and atomic force profilometry to characterize local and wafer-scale topography.
Detecting buried defects after bonding remains one of the most significant challenges. Infrared, X-ray, and acoustic imaging can identify voids, delamination, and alignment errors, but each has limitations in resolution, sensitivity, penetration depth, or throughput.

Hybrid bonding represents a paradigm shift in advanced packaging, replacing 35 µm off-chip microbumps with 10 µm pitch or smaller pad-to-pad interconnects on-chip. It can be used to join silicon-to-silicon, as in DRAM-DRAM bonding in future HBM devices, or even disparate materials like GaN-on-silicon.

This elegant process, which is available on wafer-to-wafer or die-to-wafer platforms, reduces signal delay to negligible levels while enabling smaller, thinner packages with unmatched memory/processor speeds and bandwidth. It also consumes significantly less power.

Hybrid bonding’s success depends on the performance of advanced bonding equipment, as well as metrology’s ability to verify critical alignment, cleanliness, planarity and surface properties — both before and after bonding. Solving these challenges is proving essential to realizing the vision of true 3D integration at the bonded-chip level.

But as hybrid bonding pitches continue to scale down below today’s production levels of 4 to 9 µm, some inspection and metrology methods are struggling to meet the spatial resolution and sensitivity needed to catch all relevant defect types, especially ones buried at the bond interface. Particles, voids, overlay errors, roughness, CMP defects and warpage threaten the bond quality between chips. Even a single particle can delaminate the top wafer from the one below, resulting in catastrophic failure.

At times, conventional metrology fails to differentiate a killer defect from minor topographical variation. A handful of tools, including non-destructive optical, IR, X-ray, profilometry, AFM, and acoustic inspection tools, are working to resolve critical defects smaller than 100 nm. These are some of the most stringent requirements ever imposed on a semiconductor process.

“Particles and surface contamination are among the most critical defects in hybrid bonding, as they can prevent contact between bonding surfaces and lead to the formation of voids,” said Burhan Ali, product marketing director at Onto Innovation. “Smaller interconnect pitches reduce the tolerance for defects, making even nanoscale particles capable of causing bonding voids. For leading-edge hybrid bonding processes, defect size requirements can be as low as 50 nm.”

Cracks and delamination can be particularly insidious problems, especially in the early stages of process development, but also in full-scale production. “For cracks and delamination, acoustic micro-imaging (AMI) using ultrasound in the 200MHz range provides the highest resolution,” said Bryan Schackmuth, AMI product manager at Nordson Test & Inspection. “Ultrasound does not travel through air gaps that have a thickness down to about 0.1 µm. If a crack or delamination is around the 5 µm to 10 µm size (x and y) and is at least 0.1 µm thick (z), there is a good chance that it can be detected with acoustic micro-imaging.”

Figure 1, below, shows some of the most challenging defects to capture.

Fig. 1: Hybrid bonding defects and the methods used to capture them. Source: Laura Peters/Semiconductor Engineering

Four pivotal steps
The performance and reliability of hybrid bonds largely depend on the precision and across-wafer uniformity of the four main processes, surface planarization, surface activation, precision alignment, and thermal bonding.

Chemical-mechanical polishing (CMP), which combines mechanical and chemical removal, must achieve nanometer-scale control of surface topography and copper-pad recess, with negligible surface roughness (0.5nm RMS). Otherwise, dielectric-to-dielectric voids can form during bonding.

Wafer-to-wafer hybrid bonding begins with the wafer processed to the final BEOL interconnect level. Next, a suitable dielectric (either SiCN or SiO2) is deposited and then etched to create vias to the metal below. Next, barrier and copper seed layers are deposited, followed by copper plating. Copper pads are typically square. Copper CMP then polishes the overburden to provide slight dishing (several nm) below the planar feature. That minuscule gap will be filled when the copper expands during annealing. Next, wafer cleaning removes all contaminants.

Next, the exposed dielectric is activated in a plasma vacuum chamber to create an optimized bonding surface with many dangling Si-O^– bonds. This is followed by a DI water rinse to hydrate the dielectric. Face-to-face (or face-to-back) bonding of the second wafer, processed up through copper CMP in the same manner as wafer 1, is then aligned with and bonded to wafer 1. Then the wafer pair is brought into intimate contact to form the initial bond followed by furnace annealing at 350° C for two hours to expand the copper and form permanent Cu-Cu and dielectric-dielectric bonds.

Pre-bond inspection
Prior to bonding, CMP needs to be fine-tuned to provide a flat dielectric surface with a specific run-off profile at the wafer edge. Improper edge roll-off can distort alignment marks, leading to poor contact or voids, which compromise bond strength. The roll-off region must be perfectly smooth and free of microcracks, scratches, or handling damage.

Before micro-inspections, full-wafer macro-inspection is often performed to catch scratches, large particles, or wafer edge damage. Macro-inspection complements micro-inspection findings and creates a detailed wafer map for every wafer in the lot. Scanning of every single wafer provides the necessary record-keeping for mission-critical devices.

“By inspecting 100% of the wafers at each mask level, our macro-inspection tool provides a great complement to the micro-inspection tools on the market,” said Errol Akomer, applications director at Microtronic. “Because they’re slow, they typically only sample each lot, looking at maybe two to five wafers per lot, so in many cases, they’re missing some really big defects that could affect the long-term reliability of the chips. In some applications, like data center or aerospace, the customers may select only the best chips that come out of the lot. They don’t use the marginal ones that we like to call the walking wounded.”

After cleaning, automated optical inspection (AOI) is usually performed using brightfield and darkfield modes. Darkfield inspection, which collects scattered light from defects, is particularly effective for particles and scratches, while brightfield, which collects reflected light, is useful for isolating residual material like slurry, pattern defects, and topographical surface damage.

Fig. 2: Submicron defects prior to hybrid bonding must be accurately classified to distinguish nuisance defects from killer defects. Source: Onto Innovation

Topographical variations, both local and global, affect bondability. “ln advanced processes, localized topography can be more yield-critical, but both global and localized height variations are important in hybrid bonding because they create different process failure mechanisms,” explained Maruko Wu, senior director of product marketing at Onto Innovation. “Interferometric technologies are generally applicable to measure wafer-level or die-level planarity, while OCD (optical CD) and AFM (atomic force microscope) are the best approaches for enabling extremely fine control of just a few nanometers local height variations. White-light or phase-shifting interferometry, as well as AFM, are used to measure copper recess levels.”

White-light or phase-shifting interferometry tools are provided by Bruker, KLA, Onto Innovation, and Zygo, and some companies offer double-sided inspection systems.

“Pre-bond defect inspection is commonly performed using advanced optical inspection systems, which offer high-throughput, full-wafer inspection capabilities, and can detect surface defects and particles with high sensitivity,” said Ali. The details of copper pad morphology require AFMs. “Surface roughness and copper pad topography are typically characterized using AFM, which provides nanometer- to sub-nanometer-scale resolution for accurate measurement of surface features such as roughness, dishing, and protrusion.”

AFMs are finding increasing application in the hybrid bonding process, particularly when just one nanometer of material can make a significant difference in determining whether or not the copper-copper pads fuse together during annealing. After CMP, the copper pads are recessed just 2 nm to 5 nm below the dielectric. Process control needs to keep this specified thickness within 2 nm across the wafer.

Both AFM and atomic force profilometry (AFP) are critical for surface characterization and process optimization. AFM delivers localized, high-resolution surface measurements of recess depth while illuminating pad divots or protrusions (see figure 3). AFP provides complementary large-area topography scans spanning nanometer-scale features to full wafer dimensions, including the bevel edge. AFP can reveal excessive topography at different points across a 33 × 26 mm large-area scan (see Figure 4), even when local AFM scans confirm in-spec dielectric roughness and copper pad recess. AFP is also a useful tool for monitoring wafer edge roll-off.

Fig. 3: AFM topography scans after three different CMP steps produce different recess depths. Source: Bruker

Fig. 4: Atomic force profilometry shows out-of-spec topography, despite earlier AFMs that indicated in-specification copper recess and roughness. Source: Bruker

“We are currently focused on failure analysis and three-dimensional (3D) imaging of existing bonds and potential identification of failed bonds,” said Thomas Rodgers, senior director of market strategy at Zeiss Microscopy. “Though it is outside our application scope, we are often asked to detect voids in the hybrid copper bonding interconnect, which can give insights into reliability and potential failure points.”

The company is also taking a novel approach to solving topographical issues in hybrid bonding. “Our colleagues in the Zeiss Semiconductor Manufacturing Technology business unit developed a solution for measuring and correcting surface planarity by inducing local strain in the wafer prior to backside thinning. We see increasing market interest in this solution, especially as HCB is used on multi-layer stacked die devices such as those seen in high bandwidth memory,” said Rodgers.

Post-bond metrology
After bonding, IR metrology tools verify alignment between the top and bottom copper pads because the infrared beam can penetrate the silicon. Just as too much copper recess on the pads can cause problems, too little recess can also cause problems. “Excessive copper dishing or protrusion can hinder proper Cu-Cu and dielectric-to-dielectric bonding, resulting in degraded electrical connectivity and reduced bond yield. Likewise, elevated surface roughness reduces the effective contact area between bonding surfaces, leading to lower bond strength and increased risk of bonding defects,” said Ali.

“Alignment also can be measured using 3D X-ray, both in classical computed tomography (CT) and laminography modes, giving a clear picture of the alignment and any overlay errors. We have shown some excellent results here with our tool,” said Rodgers.

For post-bonding, many engineers are turning to high-resolution X-ray imaging to inspect the bond interface, especially during early stages of process development. Advanced X-ray methods, such as laminography, allow 3D sub-micron inspection and quantification of defects, aiding in process optimization and failure analysis. High-resolution X-ray imaging is an essential technique for the development and failure analysis of hybrid bonds. A resolution of 150 nm has been demonstrated. [1]

“XRDI tends to be used for fully automated leading-edge wafer processing where the process steps can be more aggressive, and the cost of wafer loss and disruption to the line is more significant,” said John Wall, site manager at Bruker JV UK. “We can detect subsurface critical defects on patterned/metalized wafers with zero edge exclusion. Full wafer inspection can be performed at ~20wph, thus enabling in-line/at-line inspection for these critical defects.”

“When it comes to detecting cracks, delamination, and warpage, 3D X-ray is the tool of choice,” said Rodgers. “Our systems can show warpage and planarity of the bonds, while providing 3D image of cracks and voids without physically cutting the sample. Ultimately, this is used for localizing such defects.”

Acoustic microscopy, widely used to detect voids in microbumps, is now being applied to hybrid-bonded wafer stacks. “Currently, acoustic micro imaging (AMI) inspection is done after the device is fully assembled,” said Schackmuth. “With traditional microbumps, the pitch of 20µm to 40µm would normally become the critical defect size for a delamination or void. Hybrid bonding’s pitch in the 5µm to 10µm range drives the need for higher resolution capabilities in the AMI inspection.”

In acoustic imaging, the resolution is a function of the transducer’s wavelength, but at higher frequencies the acoustic signal has shallower penetration. Higher frequencies can improve lateral resolution to distinguish two closely spaced voids and detect smaller voids, provided the signal-to-noise ratio is acceptable.

Schackmuth described the differences between resolving and detecting voids with AMI. “We can go up to our 165 MHz transducer, which gets you down to a resolution of 12 microns. But there’s resolution and detection. So if you had a 12-micron defect, 165 MHz could measure it accurately. But if you had a 5-micron defect, we could detect it but not measure it accurately. So we’re in the process of developing higher frequency transducers to improve that resolution.”

Conclusion
Hybrid bonding is enabling denser, faster, and more power-efficient 3D semiconductor integration, but shrinking interconnect pitches are placing extraordinary demands on inspection and metrology. Particles, surface contamination, copper dishing, roughness, alignment errors, and buried voids can compromise bond quality, electrical performance, and long-term reliability.

To address these issues, manufacturers are combining optical inspection, interferometry, AFM, X-ray imaging, and acoustic microscopy to characterize bonding surfaces before assembly and detect hidden defects afterward. Yet no single technique provides the resolution, sensitivity, wafer coverage, and throughput required to identify every yield-critical defect.

As hybrid bonding scales toward finer pitches, the central challenge is developing faster, more sensitive, and complementary metrology methods that can distinguish yield-killing defects from harmless variations while also supporting high-volume manufacturing.

Reference

Dreier, D. Nilsson and S. Tanaka, “High-Resolution 3D X-Ray Imaging of Hybrid Bonding,” 2026 International Conference on Electronics Packaging and Hybrid Bonding Symposium (ICEP-HBS), Hiroshima, Japan, 2026, pp. 267-268, doi: 10.23919/ICEP-HBS69241.2026.11550690.

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