Chip Industry Technical Paper Roundup: Nov. 3
Chip Industry Technical Paper Roundup: Nov. 3
Semiconductor Engineering has added a batch of technical papers, covering IBM Research's meter-scale quantum processor interconnects and a 2.5D/3D chiplet GPU carbon emissions study by imec and Vrije Universiteit Brussel.
Meter-scale quantum interconnects; 2.5D/3D GPU integration and embodied emissions; secure memory-dependent prefetching; routing-aware analog placement; AI-enhanced flip-chip defect detection; superposed PCM for neural-network vector storage.
New technical papers recently added to Semiconductor Engineering’s library:
| Technical Paper | Research Organizations |
|---|---|
| Meter-scale quantum interconnects between large quantum processors | IBM Research |
| Embodied Emissions of 2.5D and 3D Scaling in Chipletized GPUs for Low-Carbon AI | imec, Vrije Universiteit Brussel |
| SecDMP: Provably Secure Data Memory-Dependent Prefetching | KU Leuven, EURECOM |
| APPlace: Co-Optimizing Device Locations and Access Points for Routing-Aware Analog Placement | UT Austin |
| AI-Based Image Enhancement Improves Detection of Interconnect Defects in Microelectronic Packaging | Materials Center Leoben, PVA TePla, ASE |
| Superposed analog memory for vector storage in neural networks | IBM Research Europe |
Find more semiconductor research papers here.
Linda Christensen
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Linda Christensen is vice president of operations and a contributing writer at Semiconductor Engineering.
Source: Semiconductor Engineering Chips and Packaging · semiengineering.com