Beyond The Chip: How AI Is Reshaping Semiconductor Design And Manufacturing
Beyond The Chip: How AI Is Reshaping Semiconductor Design And Manufacturing
Intel Foundry noted at the GSA European Executive Forum that AI scaling bottlenecks have shifted from transistors to power delivery, interconnect, advanced packaging, and supply chain resilience.
While AI is transforming nearly every industry, one of its most significant impacts is happening behind the scenes, inside the semiconductor factories responsible for building the chips that power today’s AI revolution.
During a recent presentation at the Global Semiconductor Alliance (GSA) European Executive Forum, I discussed how the conversation around AI scale is evolving. For years, the semiconductor industry focused primarily on transistor scaling. Today, however, the biggest challenges facing AI designers extend far beyond the transistor. Power delivery, connectivity, advanced packaging, and supply chain resilience are emerging as the primary constraints on AI scaling.
At Intel Foundry, we’re addressing these challenges on two fronts. First, we’re developing advanced process and packaging technologies that help customers build increasingly capable AI systems. Second, we’re using AI and machine learning (ML) throughout our technology development and manufacturing operations to improve quality, accelerate yield learning, and help customers bring products to market faster.
Three forces shaping the future of semiconductor design
Three major AI trends are shaping what modern silicon must deliver:
Agentic AI introduces multistep reasoning workloads that are far less predictable than traditional computing. Autonomous agents place new demands on power delivery and high-performance connectivity, making efficient scaling increasingly important.
Physical AI brings intelligence to edge devices and real-world systems. Scalable AI-enabled automation and modeling are essential for cost-effective, high-yield manufacturing. The foundry industry increasingly views both agentic AI and physical AI as significant long-term growth drivers.
Sovereign AI initiatives are increasing demand for secure, resilient, and geographically diverse manufacturing and supply chains to support both business continuity and national security needs. By maintaining Intel Foundry’s production capabilities across North America, Europe, and Asia, customers gain flexibility in determining where their products are manufactured while improving supply chain resilience and security.
Multi-dimensional scaling: The new path forward
A decade ago, the semiconductor industry largely focused on the system-on-chip (SoC) model, where a single chip integrated as much functionality as possible. Today, innovation has shifted toward a system of chips, using chiplet architectures that combine multiple specialized dies, memory stacks, and accelerators into a single solution. This approach provides greater modularity, scalability, and faster innovation cycles while enabling the performance required for advanced AI workloads.
At the same time, scaling is no longer simply a matter of shrinking transistors. The industry is increasingly focused on optimizing performance across the entire system, from compute and memory to packaging and interconnects. Advanced process technologies such as gate-all-around (GAA) transistors, including Intel 18A with RibbonFET GAA technology, provide improved electrostatic control and support scaling beyond traditional FinFET architectures.
Power delivery also has been reimagined. Intel 18A uses PowerVia, our backside power delivery technology that routes power through the back of the wafer rather than sharing frontside interconnect layers with signal routing. By separating power and signal paths, PowerVia reduces resistance, voltage drop, and power delivery noise. Combined with high-density metal-insulator-metal (MIM) capacitors, the architecture improves power integrity. PowerVia delivers up to a 10% increase in cell utilization¹ and a 4% improvement in ISO-power performance.² Connection to the transistor layer is enabled through innovative nano through-silicon vias (TSVs) that are approximately 500 times smaller than conventional TSVs.
While backside power adds manufacturing complexity, Intel Foundry optimized the overall cost structure by maintaining 32 nm lower-metal pitches on the frontside, enabling direct-print patterning rather than more expensive multi-patterning approaches. This balanced architecture allows Intel 18A and Intel 18A-P to deliver improved performance-per-watt and more efficient power delivery for AI-era workloads while remaining cost competitive. Intel 18A with PowerVia can provide approximately 18% performance-per-watt improvement versus Intel 3.³ Now in risk production, Intel 18A-P is expected to deliver an additional 9% performance-per-watt improvement over Intel 18A⁴ (see the Intel 18A family technical brief for details).
As systems become increasingly modular, chips must communicate efficiently with one another. This is where Universal Chiplet Interconnect Express (UCIe) plays a critical role. UCIe provides a standardized interconnect for high-bandwidth, low-latency communication between chiplets, simplifying integration and enabling more scalable heterogeneous systems.
Advanced packaging serves as the glue that connects all these technologies together. A complete AI package may combine I/O dies, advanced logic silicon, HBM, 2.5D integration, and 3D integration. Intel Foundry supports these designs through technologies including Embedded Multi-die Interconnect Bridge-T (EMIB-T), Foveros, and Foveros Direct.
EMIB-T incorporates power-transfer capabilities directly into the bridge structure, helping improve power delivery efficiency and reduce inductive power droop in multi-die AI systems. It can also reduce package material requirements by eliminating the need for a full silicon interposer in many applications.
Foveros Direct uses hybrid bonding to enable 3D integration, allowing designers to stack leading-edge compute dies on optimized base dies. This approach helps customers balance performance, power efficiency, and total cost of ownership (TCO) by placing each function on the process technology best suited to its requirements.
Using AI across the semiconductor manufacturing lifecycle
While AI is creating new challenges for chip designers, it is also helping solve many of the challenges associated with manufacturing advanced semiconductors.
At Intel Foundry, AI and ML are already deeply integrated into our manufacturing workflows, actively supporting how we develop and manufacture leading-edge process technologies (see Figure 1). One area where AI is delivering value is design technology co-optimization (DTCO). Advanced process nodes involve enormous design spaces with countless tradeoffs between power, performance, and area (PPA). AI helps engineers explore these possibilities more efficiently and identify optimal solutions.

Fig. 1: Intel Foundry’s deployment of AI and ML efforts across the manufacturing flow.
AI’s role extends beyond product design and into every stage of the manufacturing lifecycle, transforming how we identify and correct manufacturing issues. Our factories collect nearly a billion images each week, generating petabytes of manufacturing data. ML systems analyze these images to detect defects, classify failure patterns, identify yield risks, and improve design rules. This enables designers targeting Intel 18A to identify and address potential layout issues earlier in the design process, reducing risk before designs reach production.
Beyond defect detection, we use ML techniques including neural networks and ensemble decision trees to isolate root causes and accelerate defect resolution. The result is faster learning cycles and more predictable yield progression as new technologies ramp into production.
We also use digital twin technologies and predictive maintenance systems to monitor manufacturing equipment continuously. By identifying potential tool issues before they disrupt production, these systems help maintain the high levels of uptime required in semiconductor manufacturing operations that run around the clock.
Turning manufacturing innovation into customer value
In AI system design, success depends on optimizing the entire platform rather than simply choosing the most advanced transistor technology. By using AI throughout the manufacturing lifecycle, Intel Foundry is helping customers bring the next generation of AI systems to market faster and more efficiently.
Endnotes
- Based on Intel internal analysis comparing Intel 18A to Intel 3 as of February 2024. Results may vary.
- Performance results are based on testing as of dates shown in configurations and may not reflect all publicly available updates.
- “Intel 18A Platform Technology Featuring RibbonFET (GAA) and PowerVia for Advanced High-Performance Computing,” IEEE/JSAP Symposium on VLSI Technology and Circuits, June 2025.
- “Intel 18A-P CMOS Technology Enhancement Featuring Advanced RibbonFET (GAA) Transistors and PowerVia for High-Performance Computing,” IEEE/JSAP Symposium on VLSI Technology and Circuits, June 2026.
Source: Semiconductor Engineering Chips and Packaging · semiengineering.com