Semiconductor technology paper roundup: 3D DRAM, CFET, silicon photonics and more
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On October 27, 2026, Semiconductor Engineering published a curated selection of technical papers from the chip industry, compiling multiple semiconductor technology papers. Coverage includes: imec's thermal design for 3D DRAM-on-GPU; TU Munich's research on self-heating and parasitic effects in stacked CFETs; 200G/λ silicon photonics modulators; dry-deposited photoresists for electron-beam and EUV lithography; neural network SPICE modeling for 3nm processes; security-aware mapping for 3D CiM (compute-in-memory) accelerators; and an evaluation of Pt-W absorbers for high-NA EUV masks. This roundup is a dynamic update of curated technical papers, and no follow-up developments have been reported yet.
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- Semiconductor Engineering Chips and PackagingChip Industry Technical Paper Roundup: Oct. 27
Semiconductor Engineering added several semiconductor technical papers covering imec's 3D DRAM-on-GPU thermal design, TU Munich's multilayer CFET self-heating and parasitic effects, 200G/λ silicon photonics modulators, dry-deposited resists for e-beam and EUV lithography, plus neural network SPICE modeling at 3nm, security-aware mapping for 3D CiM accelerators, and Pt-W absorber evaluation for high-NA EUV masks.
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