Skip to content
Semiconductor Engineering Chips and Packaging· Technical Paper Link·· 5 days agoAI score35

Agentic AI Automates RTL Waveform Analysis And Debugging (Columbia, Google)

Agentic AI Automates RTL Waveform Analysis And Debugging (Columbia, Google)

AI introduction

Researchers from Columbia University, Google DeepMind, and Google have published a paper proposing Back-to-the-Future (BTTF), an end-to-end agentic framework that automates post-simulation waveform debugging in chip verification.

Article · English

popularity

Researchers at Columbia University, Google DeepMind, and Google published a technical paper titled “Back to the Future: Rethinking EDA Infrastructure for Agentic Systems in Chip Design Verification.”

Abstract

“The unprecedented computational scale of modern artificial intelligence depends on complex, multi-billion-transistor Systems-on-Chip, yet the workflows that verify these chips remain stubbornly manual. Although Large Language Models (LLMs) have made rapid inroads into Electronic Design Automation (EDA), approximately 74.6% of existing studies target static Register-Transfer Level (RTL) code generation, leaving post-simulation verification and interactive waveform debugging largely untouched. We introduce Back-to-the-Future (BTTF), an end-to-end agentic framework that closes this infrastructural gap. BTTF distills massive, unstructured simulation dumps into a normalized relational SQLite database and couples it with a collaborative multi-agent orchestration engine that translates natural-language verification queries into schema-aware SQL while correlating signal anomalies with versioned RTL repositories. Across a 150-query benchmark, BTTF attains 95.33% execution accuracy, charting a practical path toward autonomous EDA verification.”

Find the technical paper here. October 2026.

Yang, Je, Ivan Lobov, and Thomas Karpati. “Back to the Future: Rethinking EDA Infrastructure for Agentic Systems in Chip Design Verification.” arXiv preprint arXiv:2610.06790 (2026).

Source: Semiconductor Engineering Chips and Packaging · semiengineering.com