Generative AI On A General-Purpose Neural Processor (GPNPU)
Generative AI On A General-Purpose Neural Processor (GPNPU)
Quadric proposed the General-Purpose Neural Processor (GPNPU) in an IEEE paper, a single programmable processor architecture delivered as configurable IP that unifies scalar, vector and matrix execution into one ISA and a C++/Python programming model.
A single processor architecture that unifies scalar, vector, and matrix execution in one ISA and one C++ programming model.
Generative-AI workloads evolve on a quarterly cadence, with novel attention variants, quantization formats, and routing schemes appearing faster than fixed-function neural-processor silicon can be respun. This paper presents the General-Purpose Neural Processor (GPNPU): a single programmable processor architecture, delivered as configurable IP, that unifies scalar, vector, and matrix execution in one instruction-set architecture (ISA) and one programming model accessible from standard C++ and Python.
Read more in Quadric’s IEEE paper here.
Fig.1: Chimera GPNPU core block diagram. A single instruction stream feeds the scalar unit and the 2D SIMD PE array; per-PE detail (right) shows the 32-bit ALU, configurable MAC bank, local register-file SRAM (LRM), and neighbor-communication path. All on-chip memory (LRM and L2) is software-managed. Source: Quadric
Source: Semiconductor Engineering Chips and Packaging · semiengineering.com