RISC-V's Role in AI Chips Sparks Industry Discussion
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On November 12, 2026, Semiconductor Engineering published a discussion among industry experts focusing on RISC-V's role and limitations in AI chips. Steve Roddy of Quadric believes that using RISC-V for AI accelerators is a bad idea: splitting tasks between CPUs and accelerators brings costly data movement and compiler complexity, and the larger the scale, the worse the problem. Dave Kelf of Breker offered a different perspective: companies are using RISC-V as a control unit on top of accelerators, with custom instructions to reduce load/store latency. The discussion currently presents two positions: one holds that RISC-V is not suited for AI acceleration tasks, while the other sees practical applications at the control level and in custom extensions. There are no follow-up reports on this topic yet.
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- Semiconductor Engineering Chips and PackagingRISC-V For AI: Breakthrough Or Bad Idea?
Industry experts debated RISC-V's role in AI chips. Quadric's Steve Roddy argues that using RISC-V for AI accelerators is a bad idea: task splitting between CPU and accelerator brings costly data movement and compiler complexity, and the problem gets worse at scale; Breker's Dave Kelf observes that companies are using RISC-V as a control unit on top of accelerators, using custom instructions to reduce load/store latency.
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