How to Reduce Testing Costs for Co-Packaged Optics (CPO)
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Semiconductor Engineering held an expert panel, inviting specialists from Teradyne, Advantest, ASE's ISE Labs, and Keysight to discuss the test cost of Co-Packaged Optics (CPO). The experts noted that CPO testing costs have approached its manufacturing costs, becoming a major obstacle to large-scale adoption of the technology. The discussion focused on how to reduce CPO test costs, covering test strategies and solutions at both the chip and packaging stages. This is currently the only report on the event, with no follow-up developments or supplementary accounts.
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- Semiconductor Engineering Chips and PackagingBringing Down Test Costs For Co-Packaged Optics
Semiconductor Engineering spoke with experts from Teradyne, Advantest, ISE Labs under ASE, and Keysight about the challenge that CPO test costs are approaching manufacturing costs.
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