ETH Zurich and NYU Conduct First Real-World Measurement of HBM2 Power Consumption
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On October 14, 2026, Semiconductor Engineering reported that researchers from ETH Zurich and NYU published a paper presenting the first comprehensive experimental characterization of power consumption in real HBM2 DRAM chips. The study offers 13 new findings and 6 key conclusions. Key findings include: read operations draw significantly higher current than other operations; toggling bus signals across all bank groups raises power consumption by 29.4% compared to keeping them constant. Based on these characteristics, the team constructed specific access patterns whose measured average power consumption across 36 tested HBM2 chips was 23.6% higher than JEDEC's specified maximum-power measurement loop. The study provides new data and conclusions on measured HBM2 power consumption, revealing that existing standard test methods may underestimate actual power peaks.
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- Semiconductor Engineering Chips and PackagingCharacterization of HBM Power Consumption (ETH Zurich, NYU)
Researchers from ETH Zurich and NYU published a paper presenting the first comprehensive experimental characterization of power consumption on real HBM2 DRAM chips, with 13 new findings and 6 key conclusions. Read operations draw significantly more current than other operations, and flipping all bank group bus signals increases power by 29.4% over holding them constant. Based on this, the team constructed access patterns that on average consume 23.6% more power than the JEDEC-specified maximum power measurement loop across 36 tested HBM2 chips.
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