Terracotta: A Paper on Programmable Memory Controllers
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Researchers from ETH Zürich, CISPA, and NYU released a paper proposing the Terracotta framework, aimed at lowering the adoption barrier for new DRAM technologies through a flexible DRAM interface and a programmable memory controller. The framework includes two core components: first, custom command extensions that allow DRAM vendors to define new commands within a single standardized interface; second, a programmable memory controller that system designers can program after chip tape-out to support emerging DRAM technologies. The paper has been posted on arXiv (number 2610.06475). So far there is only coverage of the paper's release, with no news of subsequent industrialization or testing progress.
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- Semiconductor Engineering Chips and PackagingProgrammable Memory Controller Eases Adoption of New DRAM Techniques (ETH Zürich, CISPA, NYU)
Researchers from ETH Zürich, CISPA, and NYU have published a paper proposing the Terracotta framework, which simplifies deploying new DRAM technologies through a flexible DRAM interface and a programmable memory controller. The framework includes two components: a custom command extension allowing DRAM vendors to define new commands within a single standardized interface, and a programmable memory controller that system designers can program after tape-out to support new DRAM technologies. The paper is available on arXiv (number 2610.06475).