imec studies thermal design of 3D vertically stacked DRAM-on-GPU
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On October 26, 2026, Semiconductor Engineering reported that imec researchers published a paper titled 'Beyond HBM-on-GPU: Thermal Design Envelope for 3D Volumetric DRAM-on-GPU Integration'. The study evaluates a 3D memory architecture in which DRAM dies are vertically rotated and stacked above a GPU, with cooling cavities placed in between, as an alternative to conventional 2.5D HBM solutions and direct HBM-on-GPU stacking. The research focuses on the architecture's thermal design envelope. The report so far only covers the publication of the paper and its research approach; no further experimental results or industrialization progress have been reported.
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- Semiconductor Engineering Chips and PackagingVertical DRAM Stacking Expands Thermal Design Space Beyond HBM-on-GPU (imec)
imec researchers published a paper titled "Beyond HBM-on-GPU: Thermal Design Envelope for 3D Volumetric DRAM-on-GPU Integration", evaluating a 3D memory architecture that vertically rotates and stacks DRAM dies above the GPU with a cooling cavity in between, as an alternative to conventional 2.5D HBM and direct HBM-on-GPU stacking.
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