Teradyne and Siemens EDA Jointly Launch PCIe Streaming Scan Testing Solution

On November 10, 2026, Semiconductor Engineering reported that Teradyne and Siemens EDA have jointly launched a testing solution that packages test data from Siemens Tessent Streaming Scan Network and transmits it through the chip's built-in functional interfaces such as PCIe, no longer relying on traditional dedicated test channels. Meanwhile, Teradyne has integrated Tessent Silicon Executable into the IG-XL software of its UltraPort servers and UltraFLEXplus testers, connecting the two companies' tool chains at the test data transmission and execution levels. This report is the only one covering the topic so far; the event is still at the solution announcement stage, with no information yet on implementation or customer adoption.

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